參數(shù)資料
型號: MAX3420EETG+
廠商: Maxim Integrated Products
文件頁數(shù): 6/22頁
文件大?。?/td> 0K
描述: IC USB PERIPH CONTROLLER 24TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 75
控制器類型: USB 外設(shè)控制器
接口: USB/串行
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 15mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 管件
產(chǎn)品目錄頁面: 1407 (CN2011-ZH PDF)
配用: MAX3420EEVKIT-2+-ND - EVAL KIT FOR MAX3420E
pending (Figure 10). Set the POSINT bit in the PINCTL
(R17) register to make INT active high, and clear the
POSINT bit to make INT active low.
GPIN3–GPIN0, GPOUT3–GPOUT0 and GPX
The MAX3420E has four general-purpose inputs
(GPIN3–GPIN0), four general-purpose outputs
(GPOUT3–GPOUT0), and a multiplexed output pin
(GPX). GPIN3 through GPIN0 all have weak internal
pullup resistors to VL. These inputs can be read by
sampling bits 7 through 4 of the IOPINS (R20) register.
Writing to GPIN3 through GPIN0 has no effect.
GPOUT3 through GPOUT0 are the general-purpose
outputs. Update these outputs by writing to bits 3
through 0 of the IOPINS (R20) register. GPOUT3–
GPOUT0 logic levels are referenced to the voltage on
VL. As shown in Figure 11, reading the state of a
GPOUT3–GPOUT0 bit returns the state of the internal
register bit, not the actual pin state. This is useful for
doing read-modify-write operations to an output pin
(such as blinking an LED), since the load on the output
pin does not affect the register logic state.
GPX is a push-pull output with a 4-way multiplexer that
selects its output signal. The logic level on GPX is refer-
enced to VL. The SPI master writes to the GPXB and
GPXA bits of PINCTL (R17) register to select one of four
internal signals as depicted in Table 3.
OPERATE: This signal goes high when the
MAX3420E is able to operate after a power-up or
RES reset. OPERATE is the default GPX output.
VBUS_DET: VBUS_DET is the VBCOMP comparator
output. This allows the user to directly monitor the
VBUS status.
BUSACT: USB BUS activity signal (active-high).
This signal is active whenever there is traffic on
the USB bus. The BUSACT signal is set whenever
a SYNC field is detected. BUSACT goes low during
bus reset or after 32-bit times of J-state.
SOF: A square wave with a positive edge that
indicates the USB start-of-frame (Figure 12).
MOSI (Master-Out, Slave-In) and
MISO (Master-In, Slave-Out)
The SPI data pins MOSI and MISO operate differently
depending on the setting of a register bit called FDUPSPI
(full-duplex SPI). Figure 13 shows the two configurations
according to the FDUPSPI bit setting.
USB Peripheral Controller
with SPI Interface
REGISTER BIT
GPOUT
WRITE
GPOUT
READ
GPOUT
PIN
Figure 11. Behavior of Read and Write Operations on
GPOUT3–GPOUT0
Table 3. GPX Output State
GPXB
GPXA
GPX PIN OUTPUT
0
OPERATE (Default State)
0
1
VBUS_DET
1
0
BUSACT
1
SOF
FULL-SPEED
TIME FRAME
1ms
FULL-SPEED
TIME FRAME
1ms
SOF
USB
PACKETS
GPX
SOF
~50%
Figure 12. GPX Output in SOF Mode
FDUPSPI = 1
FDUPSPI = 0
(DEFAULT)
MAX3420E
MOSI
MISO
MOSI
MISO
Figure 13. MAX3420E SPI Data Pins for Full-Duplex (Top) and
Half-Duplex (Bottom) Operation
MAX3420E
14
Maxim Integrated
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MAX3420EETG+ 功能描述:外圍驅(qū)動器與原件 - PCI USB Peripheral Controller w/SPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
MAX3420EETG+T 功能描述:外圍驅(qū)動器與原件 - PCI USB Peripheral Controller w/SPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
MAX3420EETG-T 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
MAX3420EEVKIT 制造商:Maxim Integrated Products 功能描述:MAX3420E EVAL KIT - Bulk
MAX3420EEVKIT-2+ 功能描述:界面開發(fā)工具 MAX3420E Eval Kit RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V