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參數(shù)資料
| 型號(hào)： | MAX3421EEHJ+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC USB PERIPH/HOST CNTRL 32TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 控制器類型： | USB 外設(shè)控制器 |
| 接口： | USB/串行 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 15mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（5x5） |
| 包裝： | 帶卷 (TR) |
| 配用： | MAX3421EVKIT-1+-ND - EVAL KIT FOR MAX3421E |
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MAX3421E
USB Peripheral/Host Controller
with SPI Interface
19
Maxim Integrated
INIRQ: When the SEPIRQ bit of the MODE
(R27) register is set high, the BUSACT signal is
removed from the INT output and GPX is used as
an IRQ output pin dedicated to GPIN interrupts if
GPX[B:A] = 10. In this mode, GPIN interrupts
appear only on the GPX pin, and do not appear on
the INT output pin.
SOF: A square wave with a positive edge that
indicates the USB start-of-frame (Figure 14).
MOSI (Master-Out, Slave-In) and
MISO (Master-In, Slave-Out)
The SPI data pins MOSI and MISO operate differently
depending on the setting of a register bit called FDUPSPI
(full-duplex SPI). Figure 15 shows the two configurations
according to the FDUPSPI bit setting.
In full-duplex mode (FDUPSPI = 1), the MOSI and MISO
pins are separate, and the MISO pin drives only when
SS
is low. In this mode, the first eight SCLK edges (after
SS =
0) clock the command byte into the MAX3421E on MOSI,
and 8 USB status bits are clocked out of the MAX3421E
on MISO. For an SPI write cycle, any bytes following the
command byte are clocked into the MAX3421E on MOSI,
and zeros are clocked out on MISO. For an SPI read
cycle, any bytes following the command byte are clocked
out of the MAX3421E on MISO and the data on MOSI is
ignored. At the conclusion of the SPI cycle (
SS = 1), the
MISO output tri-states.
In half-duplex mode, the MOSI pin is a bidirectional pin
and the MISO pin is tri-stated. This saves a pin in the SPI
interface. Because of the shared data pin, this mode
does not offer the 8 USB status bits (Figures 6 and 7) as
the command byte is clocked into the MAX3421E. The
MISO pin can be left unconnected in half-duplex mode.
SCLK (Serial Clock)
The SPI master provides the MAX3421E SCLK signal to
clock the SPI interface. SCLK has no low-frequency limit,
and can be as high as 26MHz. The MAX3421E changes
its output data (MISO) on the falling edge of SCLK and
samples input data (MOSI) on the rising edge of SCLK.
The MAX3421E ignores SCLK transitions when
SS is
high. The inactive level of SCLK may be low or high,
depending on the SPI operating mode (Figure 16).
SS (Slave Select)
The MAX3421E SPI interface is active only when
SS is
low. When
SS is high, the MAX3421E tri-states the SPI
output pin and resets the internal MAX3421E SPI logic.
If
SS goes high before a complete byte is clocked in,
the byte-in-progress is discarded. The SPI master can
terminate an SPI cycle after clocking in the first 8 bits
(the command byte). This feature can be used in a full-
duplex system to retrieve the USB status bits (Figure 6
and 7) without sending or receiving SPI data.
Applications Information
SPI Interface
The MAX3421E operates as an SPI slave device. A reg-
ister access consists of the SPI master first writing an
SPI command byte, followed by reading or writing the
contents of the addressed register (see the
Register
Description section for more details). All SPI transfers
are MSB first. The external SPI master provides a clock
signal to the MAX3421E SCLK input. This clock fre-
quency can be between DC and 26MHz. Bit transfers
SS
MISO
MOSI
SCLK
MODE 0,0
SCLK
MODE 1,1
SPI MODE 0,0 OR 1,1
*MSB OF NEXT BYTE IN BURST MODE (SS REMAINS LOW)
Q7
Q6
Q5
Q4
Q3
D7
D6
D5
D4
D3
D2
D1
D0
*
Q2
Q1
Q0
*
Figure 16. SPI Clocking Modes
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| MAX3421EETJ+ | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB Peripheral Controller w/SPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX3421EETJ+T | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB Peripheral Controller w/SPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| MAX3421EVKIT-1+ | 功能描述:界面開發(fā)工具 MAX3421E/20E Eval Kit RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| MAX3430CPA | 功能描述:RS-485接口IC RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率:250 Kbps 工作電源電壓:3.3 V 電源電流:750 uA 工作溫度范圍:- 40 C to + 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| MAX3430CPA+ | 功能描述:RS-485接口IC Fail-Safe 1/4-Unit 3.3V Transceiver RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率:250 Kbps 工作電源電壓:3.3 V 電源電流:750 uA 工作溫度范圍:- 40 C to + 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
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