參數(shù)資料
型號(hào): MAX3815ACCM+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 11/11頁(yè)
文件大小: 0K
描述: IC DGTL VIDEO EQUALIZER 48TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 250
類型: 視頻均衡器
應(yīng)用: HDMI,DVI,接收器
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFP 裸露焊盤(7x7)
包裝: 托盤
_______________________________________________________________________________________ 9
MAX3815A
TMDS Digital Video Equalizer for
HDMI/DVI Cables
The loss-of-clock circuitry powers down the part when-
ever there is an absence of a clock signal. This mutes
the output and reduces power consumption to 83mW
whenever the input signal is removed. During power-
down, the MAX3815A’s TMDS output pins go to a high-
impedance state.
The CLKLOS is an open-collector output that requires a
resistive pullup to VCC for operation. The pullup resistor
range is 1kω to 10kω (see Figure 3).
Output Level Control (OUTLEVEL) Input
The OUTLEVEL pin is a three-state input that allows the
user to select between three output settings. Forcing this
pin high results in the standard output signal level with
no back terminations; leaving the pin open results in a
standard output swing with 267ω differential back termi-
nation resistors. Forcing this pin low results in one-half
standard output signal level.
Using Back Termination
Using back termination resistance improves signal integ-
rity through absorption of reflections. It also shifts the sin-
gle-ended output voltage high (VH) and low (VL). Table 1
shows the output voltages when using the MAX3815A in
each of its three output configurations.
Equalizer Control (EQCONTROL) Input
The EQCONTROL pin allows the user to control the
equalization in one of two ways: forcing the pin to ground
sets the equalizer in automatic equalization mode,
and forcing a voltage between VCC - 1V to VCC allows
manual control of the equalization level. Set to VCC for
maximum boost (long cable). Set to VCC - 1V for mini-
mum boost (short cable).
Interface Models
Figure 5. Simplified Input Circuit Schematic
Figure 6. Simplified Output Circuit Schematic
Table 1. Output Settings and Swings
VCC
RX_IN+/-
50
MAX3815A
RX_OUT-
PWRDWN 0
1
RX_OUT+
10mA OUTLEVEL = HIGH
12.5mA OUTLEVEL = OPEN
5mA OUTLEVEL = LOW
TRANSIENT
SUPRESSOR
CLAMP
OUTLEVEL
BACK TERMINATION
DIFFERENTIAL
SWING (mVP-P)
SINGLE-ENDED HIGH
(VH)
SINGLE-ENDED LOW
(VL)
High
Open
1000
VCC
VCC - 500mV
Open
267I
910
VCC - 85mV
VCC - 540mV
Low
Open
500
VCC
VCC - 250mV
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