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參數(shù)資料
| 型號(hào)： | AD8324JRQZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINE DRIVER CBL 3.3V 20QSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 線路驅(qū)動(dòng)器，發(fā)射器 |
| 應(yīng)用： | 調(diào)制解調(diào)器，CATV |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-QSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD8324JRQZ-REEL7DKR |
3.3 V Upstream
Cable Line Driver
Data Sheet
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2003–2013 Analog Devices, Inc. All rights reserved.
FEATURES
Supports DOCSIS 2.0 and EuroDOCSIS specifications for
reverse path transmission systems
Gain programmable in 1 dB steps over a 59 dB range
Low distortion at 61 dBmV output
59 dBc SFDR at 21 MHz
54 dBc SFDR at 65 MHz
Output noise level at minimum gain 1.3 nV/√Hz
Maintains 75 Ω output impedance in transmit-enable and
transmit-disable condition
Upper bandwidth of 100 MHz (full gain range)
3.3 V supply operation
Supports SPI interfaces
APPLICATIONS
DOCSIS 2.0 and EuroDOCSIS cable modems
CATV set-top boxes
CATV telephony modems
Coaxial and twisted pair line drivers
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The AD8324 is a low cost amplifier designed for coaxial line
driving. The features and specifications make the AD8324
ideally suited for DOCSIS 2.01 and EuroDOCSIS applications.
The gain of the AD8324 is digitally controlled. An 8-bit serial
word determines the desired output gain over a 59 dB range,
resulting in gain changes of 1 dB/LSB.
The AD8324 accepts a differential or single-ended input signal.
The output is specified for driving a 75 Ω load through a 1:1
transformer.
Distortion performance of –54 dBc is achieved with an output
level up to 61 dBmV at 65 MHz bandwidth.
This device has a sleep mode function that reduces the quiescent
current to 30 μA and a full power-down function that reduces
power-down current to 2.5 mA.
The AD8324 is packaged in a low cost, 20-lead LFCSP and a
20-lead QSOP. The AD8324 operates from a single 3.3 V supply.
Figure 2. Worst Harmonic Distortion vs. Frequency
1 DOCSIS is a registered trademark of Cable Television Laboratories, Inc.
VIN+
VIN–
VOUT+
VOUT–
ZIN (SINGLE) = 550
ZIN (DIFF) = 1100
RAMP
ZOUT DIFF =
75
SHIFT
REGISTER
DATA LATCH
DECODE
POWER-
DOWN LOGIC
GND
DATEN SDATA CLK
TXEN
SLEEP
8
AD8324
VERNIER
DIFF
OR SINGLE
INPUT
AMP
OUTPUT
STAGE
BYP
ATTENUATION
CORE
04
339
-0
01
FREQUENCY (MHz)
DISTORTION
(dBc)
515
–80
–70
–50
–60
–40
25
35
45
55
65
04339-0-002
VOUT = 61dBmV @ DEC 60
SECOND HARMONIC
VOUT = 61dBmV @ DEC 60
THIRD HARMONIC
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