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參數(shù)資料
| 型號： | MAX5725AAUP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 18/35頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT SRL 20TSSOP |
| 標準包裝： | 2,500 |
| 設置時間： | 4.5µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 1.08W |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 8 電流，單極 |
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MAX5723/MAX5724/MAX5725
Ultra-Small, Octal-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and SPI Interface
25
Maxim Integrated
Table 6. REF Command Format
REF Command
The REF command (B[23:20] = 0010) updates the global
reference setting used for all DAC channels. If an internal
reference mode is selected, bit RF2 (B18) defines the
reference power mode. If RF2 is set to zero (default), the
reference will be powered down any time all DAC chan-
nels are powered down (i.e. the device is in STANDBY
mode). If RF2 is set to one, the reference will remain pow-
ered even if all DAC channels are powered down, allow-
ing continued operation of external circuitry (note in this
mode the low current shutdown state is not available).
This command is inaccessible when a watchdog timeout
has occurred and the watchdog timer is configured with
a safety level of high or max.
SW_GATE_CLR Command
The SW_GATE_CLR command (B[23:0] = 0011_0000_
1001_0110_0011_0000) will remove any existing GATE
condition initiated by a previous SW_GATE_SET comand.
SW_GATE_SET Command
The SW_GATE_SET command (B[23:0] = 0011_0001_
1001_0110_0011_0000) will initiate a GATE condition.
Any DACs configured with GTB = 0 (see the CONFIG
Command section) will have their outputs held at the
selected DEFAULT value until the GATE condition is later
removed by a subsequent SW_GATE_CLR command.
While in gate mode, the CODE and DAC registers con-
tinue to function normally and are not reset (unless reset
by a watchdog timeout).
WD_REFRESH Command
The WD_REFRESH command (B[23:0] = 0011_0010_
1001_0110_0011_0000) will refresh the watchdog timer.
This is the only command which will refresh the watch-
dog timer if the device is configured with a safety level of
medium, high, or max. Use this command to prevent the
watchdog timer from timing out.
WD_RESET Command
A WD_RESET command (B[23:0] = 0011_0011_
1001_0110_0011_0000) will reset the watchdog interrupt
(timeout) status and refresh the watchdog timer. Use this
command to reset the IRQ timeout condition after the
watchdog timer has timed out. Any DACs impacted by an
existing timeout condition will return to normal operation.
SW_CLEAR Command
A software clear command (B[23:0] = 0011_0100_
001_0110_0011_0000) will clear the contents of the CODE
and DAC registers to the DEFAULT state for all channels
configured with CLB = 0 (see CONFIG command).
SW_RESET Command
A software reset command (B[23:0] = 0011_0101_
1001_0110_0011_0000) will reset all CODE, DAC,
and configuration registers to their defaults (including
POWER, DEFAULT, CONFIG, WDOG, and REF regis-
ters), simulating a power-on reset.
B23 B22 B21 B20 B19
B18
B17 B16 B15 B14 B13 B12 B11 B10 B9
B8 B7 B6 B5 B4 B3 B2 B1 B0
0
1
0
RF2
RF1 RF0
X
REF Command
Reserved
0=
DAC
Controlled
1=
Always
ON
REF Mode:
00: EXT
01: 2.5V
10: 2.0V
11: 4.0V
Don’t Care
Default Value
→
0
X
Command Byte
Data High Byte
Data Low Byte
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