參數(shù)資料
型號(hào): MAX7456EVKIT+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 32/44頁(yè)
文件大?。?/td> 0K
描述: KIT EVAL FOR MAX7456
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
主要目的: 視頻,屏幕顯示器(OSD)
嵌入式: 是,MCU,16 位
已用 IC / 零件: MAX7456
主要屬性: NTSC/PAL 單通道單色屏幕顯示器(OSD),帶集成視頻驅(qū)動(dòng)器
次要屬性: GUI,SPI 接口
已供物品:
產(chǎn)品目錄頁(yè)面: 1424 (CN2011-ZH PDF)
Single-Channel Monochrome On-Screen
Display with Integrated EEPROM
Applications Information
Character-Memory Operation
Only whole characters (54 bytes of pixel data) can be
written to or read from the NVM character memory at one
time. This is done through the (64 byte) shadow RAM
(see Figure 13). The shadow RAM is accessed by the
SPI port one byte at a time. The shadow RAM is written
to and read from the NVM by a single SPI command.
Steps for Writing Character Bytes
into the NVM Character Memory
Writing a new character:
1) Write VM0[3] = 0 to disable the OSD image display.
2) Write CMAH[7:0] = xxH to select the character
(0–255) to be written (Figures 10 and 13).
3) Write CMAL[7:0] = xxH to select the 4-pixel byte
(0–63) in the character to be written (Figures 10 and
13).
4) Write CMDI[7:0] = xxH to set the pixel values of the
selected part of the character (Figures 11 and 13).
5) Repeat steps 3 and 4 until all 54 bytes of the char-
acter data are loaded into the shadow RAM.
6) Write CMM[7:0] = 1010xxxx to write to the NVM
array from the shadow RAM (Figure 13). The char-
acter memory is busy for approximately 12ms dur-
ing this operation. STAT[5] can be read to verify that
the NVM writing process is complete.
7) Write VM0[3] = 1 to enable the OSD image display.
Modifying an existing character:
1) Write VM0[3] = 0 to disable the OSD image display.
2) Write CMAH[7:0] = xxH to select the character
(0–255) to be modified (Figures 10 and 13).
3) Write CMM[7:0] = 0101xxxx to read character data
from the NVM to the shadow RAM (Figure 13).
4) Write CMAL[7:0] = xxH to select the 4-pixel byte
(0–63) in the character to be modified (Figures 10
and 13).
5) Read CMDO[7:0] = xxH to read the byte of 4-pixel
data to be modified (Figures 11 and 13).
6) Modify the byte of 4-pixel data as desired.
7) Write CMDI[7:0] = xxH to write the modified byte of
4-pixel data back to the shadow RAM (Figures 11
and 13).
8) Repeat steps 4 through 7 as needed until all pixels
have been loaded into the shadow RAM.
9) Write CMM[7:0] = 1010xxxx to write the shadow
RAM data to the NVM (Figure 13). The character
memory is busy for typically 12ms during this oper-
ation. STAT[5] can be read to verify that the NVM
writing process is complete.
10) Write VM0[3] =1 to enable the OSD image display.
Steps for Reading Character
Bytes from Character Memory
1) Write VM0[3] = 0 to disable the OSD image.
2) Write CMAH[7:0] = xxH to select the character
(0–255) to be read (Figures 10 and 13).
3) Write CMM[7:0] = 0101xxxx to read the character
data from the NVM to the shadow RAM (Figure 13).
4) Write CMAL[7:0] = xxH to select the 4-pixel byte
(0–63) in the character to be read (Figures 10 and 13).
5) Read CMDO[7:0] = xxH to read the selected 4-pixel
byte of data (Figures 11 and 13).
6) Repeat steps 4 and 5 to read other bytes of 4-pixel
data.
7) Write VM0[3] = 1 to enable the OSD image display.
Display-Memory Operation
The following two steps enable viewing of the OSD
image. These steps are not required to read from or
write to the display memory:
1) Write VM0[3] = 1 to enable the display of the OSD
image.
2) Write OSDBL[4] = 0 to enable automatic OSD black
level control. This ensures the correct OSD image
brightness. This register contains 4 factory-preset
bits [3:0] that must not be changed. Therefore,
when changing bit 4, first read OSDBL[7:0], modify
bit 4, and then write back the updated byte.
Steps for Clearing Display Memory
Write DMM[2] = 1 to start the clear display-memory
operation. This operation typically takes 20s. The
Display Memory Mode register cannot be written to
again until the clear operation is complete. DMM[2] is
automatically reset to zero upon completion.
Steps for Writing to
Display Memory in 8-Bit Mode
The 8-bit operation mode provides maximum flexibility
when writing characters to the display memory. This
mode enables writing individual Character Attribute
bytes for each character (see Table 5). This mode is
distinct from the 16-bit operation mode where the
Character Attribute byte is automatically copied from
DMM[5:3] when a character is written (Figure 19).
Write DMM[6] = 1 to select the 8-bit operation mode.
MAX7456
38
Maxim Integrated
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