參數(shù)資料
型號(hào)： MAX9238EUM+
廠商： Maxim Integrated Products
文件頁數(shù)： 15/15頁
文件大小： 0K
描述： IC DESERIALIZER 21BIT 48TSSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 39
功能： 解串器
數(shù)據(jù)速率： 1.386Gbps
輸入類型： LVDS
輸出類型： LVTTL，LVCMOS
輸入數(shù)： 3
輸出數(shù)： 21
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-TFSOP（0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 48-TSSOP
包裝： 管件
MAX9234/MAX9236/MAX9238
Hot-Swappable, 21-Bit, DC-Balanced LVDS
Deserializers
9
Maxim Integrated
MAX9234/MAX9236/MAX9238 vs.
MAX9210/MAX9220/MAX9222
The MAX9234/MAX9236/MAX9238 operate in DC-bal-
ance mode only. Pinouts are the same as the
MAX9210/MAX9220/MAX9222 except that pin 6 on the
MAX9234/MAX9236/MAX9238 is no connect (N.C.). DC
balance allows AC-coupling with series capacitors. The
MAX9234/MAX9236/MAX9238 are hot-swappable and
the input frequency can be changed on the fly, but oth-
erwise the specifications and functionality are the same
as the MAX9210/MAX9220/MAX9222 operating in DC-
balance mode. See Table 1.
Applications Information
Selection of AC-Coupling Capacitors
Voltage droop and the DSV of transmitted symbols
cause signal transitions to start from different voltage
levels. Because the transition time is finite, starting the
signal transition from different voltage levels causes
timing jitter. The time constant for an AC-coupled link
needs to be chosen to reduce droop and jitter to an
acceptable level.
The RC network for an AC-coupled link consists of the
LVDS receiver termination resistor (RT), the LVDS driver
output resistor (RO), and the series AC-coupling capac-
itors (C). The RC time constant for two equal-value
series capacitors is (C x (RT + RO)) / 2 (Figure 10). The
RC time constant for four equal-value series capacitors
is (C x (RT + RO)) / 4 (Figure 11).
RT is required to match the transmission line imped-
ance (usually 100
) and RO is determined by the LVDS
driver design (the minimum differential output resis-
tance of 78
for the MAX9209/MAX9211/MAX9213/
MAX9215 serializers is used in the following example).
This leaves the capacitor selection to change the sys-
tem time constant.
TxIN_, DCA_, AND DCB_ ARE DATA FROM THE SERIALIZER.
DCA0
DCB1
DCA1
DCB2
DCA2
CYCLE N + 1
CYCLE N
CYCLE N - 1
TxIN2
TxIN6
TxIN3
TxIN4
TxIN5
TxIN9
TxIN13
TxIN10
TxIN11
TxIN12
TxIN2
TxIN3
TxIN4
DCA0
TxIN5
TxIN6
DCB0
TxIN9
TxIN10
TxIN11
DCA1
TxIN12
TxIN13
DCB1
TxIN16
TxIN17
TxIN18
DCA2
TxIN19
TxIN20
DCB2
TxIN0
TxIN1
TxIN7
TxIN8
TxIN14
TxIN15
TxIN16
TxIN20
TxIN17
TxIN18
TxIN19
DCB0
RxCLK IN
RxIN1
RxIN0
RxIN2
TxIN1
TxIN8
TxIN15
TxIN0
TxIN7
TxIN14
+
-
Figure 9. Deserializer Serial Input
0.8V
PWRDWN
RxCLK IN
RxOUT_
RxCLK OUT
RPDD
HIGH-Z
Figure 8. Power-Down Delay
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9238EUM+ 功能描述:串行器/解串器 - Serdes 21-Bit DC-Balanced LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9238EUM+T 功能描述:串行器/解串器 - Serdes 21-Bit DC-Balanced LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9238EUM-D 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
MAX9238EUM-T 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
MAX9238EUM-TD 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
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