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參數(shù)資料
| 型號： | MAX9238EUM+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DESERIALIZER 21BIT 48TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 39 |
| 功能： | 解串器 |
| 數(shù)據(jù)速率： | 1.386Gbps |
| 輸入類型： | LVDS |
| 輸出類型： | LVTTL，LVCMOS |
| 輸入數(shù)： | 3 |
| 輸出數(shù)： | 21 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-TSSOP |
| 包裝： | 管件 |
MAX9234/MAX9236/MAX9238
Hot-Swappable, 21-Bit, DC-Balanced LVDS
Deserializers
12
Maxim Integrated
Board Layout
Keep the LVTTL/LVCMOS outputs and LVDS input sig-
nals separated to prevent crosstalk. A four-layer PC
board with separate layers for power, ground, LVDS
inputs, and digital signals is recommended.
ESD Protection
The MAX9234/MAX9236/MAX9238 ESD tolerance is
rated for IEC 61000-4-2 Human Body Model and ISO
10605 standards. IEC 61000-4-2 and ISO 10605 specifiy
ESD tolerance for electronic systems. The Human Body
Model discharge components are CS = 100pF and RD =
1.5k
(Figure 12). For the Human Body Model, all pins
are rated for ±5kV contact discharge. The ISO 10605 dis-
charge components are CS = 330pF and RD = 2k
(Figure 13). For ISO 10605, the LVDS outputs are rated
for ±8kV contact and ±25kV air discharge. The IEC
61000-4-2 discharge components are CS = 150pF and
RD = 330 (Figure 14). For IEC 61000-4-2, the LVDS
inputs are rated for ±8kV Contact Discharge and ±15kV
Air-Gap Discharge.
5V Tolerant Input
PWRDWN is 5V tolerant and is internally pulled down to
GND.
Skew Margin (RSKM)
Skew margin (RSKM) is the time allowed for degrada-
tion of the serial data sampling setup and hold times by
sources other than the deserializer. The deserializer
sampling uncertainty is accounted for and does not
need to be subtracted from RSKM. The main outside
contributors of jitter and skew that subtract from RSKM
are interconnect intersymbol interference, serializer
pulse position uncertainty, and pair-to-pair path skew.
VCCO Output Supply and Power Dissipation
The outputs have a separate supply (VCCO) for interfacing
to systems with 1.8V to 5V nominal input-logic levels. The
DC Electrical Characteristics table gives the maximum
supply current for VCCO = 3.6V with 8pF load at several
switching frequencies with all outputs switching in the
worst-case switching pattern. The approximate incremen-
tal supply current for VCCO other than 3.6V with the same
8pF load and worst-case pattern can be calculated using:
II = CTVI 0.5fC x 21 (data outputs)
+ CTVIfC x 1 (clock output)
where:
II = incremental supply current.
CT = total internal (CINT) and external (CL) load capaci-
tance.
VI = incremental supply voltage.
fC = output clock-switching frequency.
The incremental current is added to (for VCCO
> 3.6V)
or subtracted from (for VCCO
< 3.6V) the DC Electrical
Characteristics table maximum supply current. The
internal output buffer capacitance is CINT = 6pF. The
worst-case pattern-switching frequency of the data out-
puts is half the switching frequency of the output clock.
In the following example, the incremental supply current is
calculated for VCCO = 5.5V, fC = 34MHz, and CL = 8pF:
VI = 5.5V - 3.6V = 1.9V
CT = CINT + CL = 6pF + 8pF = 14pF
Figure 13. ISO 10605 Contact Discharge ESD Test Circuit
Figure 12. Human Body ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
R1
1M
R2
1.5k
CS
100pF
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
R1
50
TO 100
R2
2k
CS
330pF
Figure 14. IEC 61000-4-2 Contact Discharge ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
50
TO 100
RD
330
CS
150pF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9238EUM+ | 功能描述:串行器/解串器 - Serdes 21-Bit DC-Balanced LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9238EUM+T | 功能描述:串行器/解串器 - Serdes 21-Bit DC-Balanced LVDS Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9238EUM-D | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9238EUM-T | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9238EUM-TD | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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