參數(shù)資料
型號(hào): MAX9671CTH+T
廠商: Maxim Integrated Products
文件頁數(shù): 9/44頁
文件大?。?/td> 0K
描述: IC AUDIO/VIDEO SWIT DUAL 44TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
功能: 音頻/視頻切換
電路: 2 x SCART
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 3.3 V ~ 12 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 44-TQFN-EP(7x7)
包裝: 帶卷 (TR)
配用: MAX9671EVKIT+-ND - EVALUATION KIT FOR MAX9671
MAX9670/MAX9671
Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
______________________________________________________________________________________
17
Video Inputs
Whether the incoming video signal is AC-coupled or
DC-coupled into the MAX9670/MAX9671 depends
upon the origin, format, and voltage range of the video
signal. Table 1 below shows the recommended con-
nections. Always AC-couple an external video signal
through a 0.1F capacitor because its voltage is not
well defined (see the
Typical Application Circuit). For
example, the video transmitter circuit might have a dif-
ferent ground than the video receiver, thereby level
shifting the DC bias. 60Hz power line hum might cause
the video signal to change DC bias slowly.
Internal video signals that are between 0 and 1V can be
DC-coupled. Most video DACs generate video signals
between 0 and 1V because the video DAC sources cur-
rent into a ground-referenced resistor. For the minority
of video DACs that generate video signals between
2.3V and 3.3V because the video DAC sinks current
from a VVID-referenced resistor, AC-couple the video
signal to the MAX9670/MAX9671.
The MAX9670/MAX9671 restore the DC level of incom-
ing, AC-coupled video signals with either transparent
sync-tip clamps or bias circuits. When using an AC-
coupled input, the transparent sync-tip clamp automati-
cally clamps the input signal minimum to ground,
preventing it from going lower. A small current of 1A
pulls down on the input to prevent an AC-coupled sig-
nal from drifting outside the input range of the part. Use
sync-tip clamps with CVBS, RGB, and luma signals.
The transparent sync-tip clamp is transparent when the
incoming video signal is DC-coupled and at or above
ground. Under such conditions, the clamp never acti-
vates. Therefore, the outputs of video DACs that gener-
ate signals between 0 and 1V can be directly
connected to the MAX9670/MAX9671 inputs.
The bias circuit accepts AC-coupled chroma, which is
a subcarrier with the color information modulated onto
it. The bias voltage of the bias circuits is around
600mV.
ENC_R/C_IN and VCR_R/C_IN can receive either a red
video signal or a chroma video signal. Set the input con-
figuration by writing to bits 7 and 3 of the VCR Video
Input Control register (08h). See Tables 10 and 16.
The MAX9670/MAX9671 also have video input detec-
tion. When activated, activity detect circuits check if
sync is present on incoming CVBS and luma (Y) sig-
nals. If so, then there is a valid video signal. Read bits
0, 2, 4, and 5 of the Video Activity Status register (0Fh)
to determine the status of the CVBS and luma (Y)
inputs. See Table 21.
In high-impedance mode, the inputs to the MAX9670/
MAX9671 do not distort the video signal in case the out-
puts of the video DAC are also connected to another
video circuit such as a high-definition video filter amplifi-
er. See the
SCART Set-Top Box with Analog HD Outputs
section. The inputs in high-impedance mode are biased
at VVID/3, which is sufficiently above ground so that the
ESD diodes never forward biases as the video signal
changes. The input resistance is 222k
, which presents
negligible loading on the video current DAC.
Video Reconstruction Filter
The video DAC outputs of the set-top box decoder chip
need to be lowpass-filtered to reject the out-of-band
noise. The MAX9670/MAX9671 integrate sixth-order,
Butterworth filters. The filter passband (±1dB) is typical-
ly 5.5MHz, and the attenuation at 27MHz is 52dB. The
filters are suited for standard-definition video.
Video Outputs
The video output amplifiers can both source and sink
load current, allowing output loads to be DC- or AC-
coupled. The amplifier output stage needs around
300mV of headroom from either supply rail. For video
signals with a sync pulse, the sync tip is typically at
300mV, as shown in Figure 4. For a chroma signal, the
blank level is typically at 1.5V, as shown in Figure 5.
If the supply voltage is greater than 3.135V (5% below
a 3.3V supply), each amplifier can drive two DC-cou-
pled video loads to ground. If the supply is less than
3.135V, each amplifier can drive only one DC-coupled
or AC-coupled video load.
The SCART standard allows for video signals to have a
superimposed DC component within 0 and 2V.
Therefore, most video signals are DC-coupled at the
output. In the unlikely event that the video signal needs
to be AC-coupled, the coupling capacitors should be
220F or greater to keep the highpass filter formed by
the 37.5
equivalent resistance of the video transmis-
sion line to a corner frequency of 4.8Hz or below to keep
it well below the 25Hz frame rate of the PAL standard.
The CVBS outputs have load sense circuits. If enabled,
each load sense circuit checks for a load eight times
per second by connecting an internal 15k
pullup
resistor to the output for 1ms. If the output is pulled up,
no load is present. If the output stays low, a load is con-
nected. Read bits 1 and 3 of the Video Activity Status
register (0Fh) to determine load status. See Table 21.
The selection of video sources that are sent to the TV
SCART connector are controlled by bits 0 to 4 of the TV
Video Input Control register (06h) while the selection of
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