參數(shù)資料
型號(hào): MB8117400B-60
廠商: Fujitsu Limited
英文描述: 4 M ×4 BITS Fast Page Mode Dynamic RAM(CMOS 4 M ×4 位快速頁面存取模式RAM)
中文描述: 4米× 4位快速頁面模式動(dòng)態(tài)RAM(的CMOS 4米× 4位快速頁面存取模式的RAM)
文件頁數(shù): 15/28頁
文件大?。?/td> 473K
代理商: MB8117400B-60
15
MB8117400B-50/-60
Fig. 6 – EARLY WRITE CYCLE (OE = “H” or “L”)
DESCRIPTION
A write cycle is similar to a read cycle except WE is set to a Low state and OE is a “H” or “L” signal. A write cycle can be implemented
in either of three ways-early write, OE write (delayed write), or read-modify-write. During all write cycles, timing parameters t
RWL
, t
CWL
and t
RAL
must be satisfied. In the early write cycle shown above t
WCS
satisfied, data on the DQ pin is latched with the falling edge of CAS
and written into memory.
ROW
ADD
VALID
DATA IN
COLUMN
ADD
HIGH-Z
WE
CAS
RAS
A
0
to A
10
V
OH
V
OL
t
RC
t
RAS
t
CRP
t
RAD
t
RCD
t
CSH
t
RSH
t
CAS
t
ASC
t
RAH
t
ASR
t
CAL
t
RAL
t
CAH
t
RP
t
WCH
t
WCS
t
DS
t
DH
t
AR
t
CWL
t
WCR
t
WP
t
RWL
t
DHR
“H” or “L” level (excluding Address and DQ)
“H” or “L” level, “H
L” or “L
H” transition (Address and DQ)
DQ
(Output)
DQ
(Input)
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
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