參數(shù)資料
型號(hào): MB81V4800S-60
廠商: Fujitsu Limited
英文描述: CMOS 512K×8 BIT Fast Page Mode DRAM(CMOS 512K×8位快速頁(yè)面存取模式動(dòng)態(tài)RAM)
中文描述: 的CMOS為512k × 8位快速頁(yè)面模式的DRAM(的CMOS為512k × 8位快速頁(yè)面存取模式動(dòng)態(tài)內(nèi)存)
文件頁(yè)數(shù): 14/26頁(yè)
文件大?。?/td> 328K
代理商: MB81V4800S-60
14
MB81V4800S-60/MB81V4800S-70
Fig. 8 – READ-MODIFY-WRITE CYCLE
RAS
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
CAS
WE
DQ
(Input)
A
0
to A
9
V
OH
V
OL
DQ
(Output)
V
IH
V
IL
OE
DESCRIPTION
The read-modify-write cycle is executed by changing WE from High to Low after the data appears on the DQ pins. In the read-
modify-write cycle, OE must be changed from Low to High after the memory access time.
“H” or
VALID
DATA IN
COL
ADD
ROW
ADD
HIGH-Z
HIGH-Z
VALID
HIGH-Z
t
ASC
t
RP
t
RWC
t
RAS
t
RCD
t
CRP
t
ASR
t
CAH
t
RAH
t
RAD
t
AR
t
CSH
t
CAS
t
RSH
t
RAL
t
DS
t
RWL
t
RCS
t
CWL
t
DH
t
CWD
t
WP
t
RWD
t
AWD
t
WCR
t
DZC
t
OED
t
DZO
t
OEH
t
OEZ
t
DHR
t
CAC
t
RAC
t
AA
t
ON
t
ON
t
OEA
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MB81V4800S-70 CMOS 512K×8 BIT Fast Page Mode DRAM(CMOS 512K×8位快速頁(yè)面存取模式動(dòng)態(tài)RAM)
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