3-18 Chapter 3 CPU
MB89190/190A series
(1) After reset, all the interrupt requests are in the disabled state.
The resource initialization program initializes each resource from where an interrupt occurs, sets the
interrupt level to the relevant interrupt level setting registers (ILR1, 2, 3), and operates the resource(s).
The interrupt level that can be set is 1, 2, or 3. Level 1 is the highest, and level 2 is the next highest.
When level 3 is set, the interrupt from the relevant resource is disabled.
(2) The main program (interrupt-processing routine for multiple interrupt) is executed.
(3) When an interrupt occurs from the resource(s), the interrupt request flag bit (request FF) for the
resource is set to 1. When the interrupt request enable bit for the resource indicates Enable (enable
FF = 1) at this point, an interrupt request is output to the interrupt controller.
(4) The interrupt controller always supervises the interrupt requests from each resource, and
communicates the highest interrupt level among the interrupt levels associated with the current
interrupt requests to the CPU. At this point, the priority of two or more interrupt requests with the
same interrupt level is also determined.
(5) When the interrupt level received by the CPU is smaller (higher priority) than the one set at the
interrupt level bits of the condition code register (CCR: IL1, 0), the CPU checks the contents of the
interrupt enable flag (CCR: I), and accepts the interrupt if the flag indicates Enable (CCR: I = 1).
(6) The contents of the program counter (PC) and the contents of the program status (PS) are saved in
the stack, the starting address of the interrupt-processing routine is accepted from the appropriate
interrupt vector table, the value of the interrupt level bits of the condition code register (CCR: IL1, 0) is
changed to the value of the accepted interrupt level, and then execution of the interrupt-processing
routine is started.
(7) Lastly, the value of the program counter (PC) and the program status (PS) saved in the stack is
returned using the
RETI instruction, and processing is executed starting with the instruction
immediately after the one executed just before the interrupt.
Check:
The interrupt request flag bit for the resource is not cleared automatically even if the
interrupt request is accepted, so it is necessary to clear it using the interrupt-processing
routine (Normally, 0 is written to the interrupt request flag bit).
Reference:
Standby mode (low power consumption) is cancelled by an interrupt.
For details, see
Section 3.7.
Remark:
When the interrupt request flag bit is cleared at the beginning of the interrupt-processing
routine, it becomes possible for the resource(s) that generated the interrupt to generate a
re-interrupt during execution of the interrupt-processing routine (the interrupt request flag bit
is reset). However, acceptance of the interrupt is performed after termination of the current
interrupt-processing routine.