ii
3.7.2
Sleep Mode .................................................................................................................3-38
3.7.3
Stop Mode ...................................................................................................................3-39
3.7.4
Standby Control Register (STBC) ...............................................................................3-40
3.7.5
State Transition Diagram.............................................................................................3-42
3.7.6
Pin State in Standby Mode ..........................................................................................3-43
3.7.7
Precautions when Using Standby Mode......................................................................3-44
3.8
Memory Access Mode .............................................................................................................3-45
4. I/O PORTS
4.1
Overview of I/O Ports.................................................................................................................4-3
4.2
Port 0 .........................................................................................................................................4-5
4.2.1
Port 0 Registers (PDR0, DDR0) ....................................................................................4-8
4.2.2
Explanation of Port 0 Operation ..................................................................................4-10
4.3
Port 3 .......................................................................................................................................4-12
4.3.1
Port 3 Registers (PDR3, DDR3) ..................................................................................4-14
4.3.2
Explanation of Port 3 Operation ..................................................................................4-16
4.4
Port 4 .......................................................................................................................................4-18
4.4.1
Port 4 Register (PDR4)................................................................................................4-20
4.4.2
Explanation of Port 4 Operation ..................................................................................4-21
4.5
I/O Port Program Example.......................................................................................................4-22
5. TIME-BASE TIMER
5.1
Overview of Time-base Timer ...................................................................................................5-3
5.2
Configuration of Time-base Timer .............................................................................................5-5
5.3
Time-base Timer Control Register (TBTC) ...............................................................................5-6
5.4
Time-base Timer Interrupt .........................................................................................................5-8
5.5
Explanation of Time-base Timer Operation...............................................................................5-9
5.6
Notes on Using Time-base Timer............................................................................................5-11
5.7
Time-base Timer Program Example .......................................................................................5-12
6. WATCHDOG TIMER
6.1
Overview of Watchdog Timer ....................................................................................................6-3
6.2
Configuration of Watchdog Timer..............................................................................................6-4
6.3
Watchdog Control Register (WDTC) .........................................................................................6-5
6.4
Explanation of Watchdog Timer Operation................................................................................6-6
6.5
Notes on Using Watchdog Timer...............................................................................................6-7
6.6
Watchdog Timer Program Example .........................................................................................6-8