201
7.4 Structure of 8-bit PWM Timer 2
7.4.2
PWM 2 Compare Register (COMR2)
The PWM 2 compare register (COMR2) sets the interval time for the interval timer
function. The register value sets the "H" width of the pulse for the PWM timer function.
s PWM 2 Compare Register (COMR2)
Figure 7.4-5 "PWM2 Compare Register (COMR2)" shows the bit structure of the PWM 2
compare register.
As the register is write-only, bit manipulation instructions cannot be used.
Figure 7.4-5 PWM2 Compare Register (COMR2)
r Interval timer operation
This register is used to set the value to be compared with the counter value. The register
specifies the interval time.
The counter is cleared when the counter value matches the value set in this register, and the
interrupt request flag bit is set to "1" (CNTR2: TIR = "1").
If data is written to the COMR2 register during counter operation, the new value applies from the
next cycle (after the next match is detected).
Note:
The COMR2 setting for interval timer operation can be calculated using the following
formula.
(The instruction cycle time is affected by the clock mode, and the speed-shift selection.)
COMR2 register value = interval time/(count clock cycle × instruction cycle) - 1
r PWM timer operation
This register is used to set the value to be compared with the counter value. The register
therefore sets the "H" width of the pulse.
The PWM2 pin outputs an "H" level until the counter value matches the value set in this register.
From the match until the counter value overflows, the PWM2 pin outputs an "L" level.
If data is written to the COMR2 register during counter operation, the new value applies from the
next cycle (after the next overflow).
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Initial value
0021H
XXXXXXXXB
WWW
WWWWW
W: Write-only
X: Indeterminate