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參數(shù)資料
| 型號： | MB90F462PFM |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125 |
| 中文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 61/85頁 |
| 文件大?。?/td> | 827K |
| 代理商： | MB90F462PFM |
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MB90460 Series
61
16. 512 Kbit Flash Memory
The 512 Kbit flash memory is allocated in the FE
H
to FF
H
banks on the CPU memory map. Like masked ROM,
flash memory is read-accessible and program-accessible to the CPU using the flash memory interface circuit.
The flash memory can be programmed/erased by the instruction from the CPU via the flash memory interface
circuit. The flash memory can therefore be reprogrammed (updated) while still on the circuit board under inte-
grated CPU control, allowing program code and data to be improved efficiently.
Note that sector operations such as “enable sector protect” cannot be used.
Features of 512 Kbit flash memory
64 kwords
×
8 bits/32 kwords
×
16 bits (16 k
+
8 k
+
8 k
+
32 k) sector configuration
Automatic program algorithm (same as the Embedded Algorithm* : MBM29F400TA)
Installation of the deletion temporary stop/delete restart function
Write/delete completion detected by the data polling or toggle bit
Write/delete completion detected by the CPU interrupt
Compatibility with the JEDEC standard-type command
Each sector deletion can be executed (Sectors can be freely combined) .
Flash security feature
Number of write/delete operations 10,000 times guaranteed.
Flash reading cycle time (Min) 2 machine cycles
* : Embedded Algorithm is a trademark of Advanced Micro Devices, Inc.
(1) Register configuration
Flash Memory Control status register
Bit number
FMCS
Address : 0000AE
H
Read/write
Initial value
R/W
0
R/W
0
R
1
W
0
W
0
W
0
R/W
0
7
6
5
4
3
2
1
0
RDYINT
R/W
0
INTE
WE
RDY
Reserved
LPM1
Reserved
LMP0
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