參數(shù)資料
型號: MB90F897
廠商: Fujitsu Limited
英文描述: 10-Bit Buffers/Drivers With 3-State Outputs 24-CFP -55 to 125
中文描述: 16位微控制器專有
文件頁數(shù): 32/78頁
文件大?。?/td> 746K
代理商: MB90F897
MB90895 Series
32
Watchdog timer block diagram
2
1
2
2
2
11
2
12
2
13
2
14
2
15
2
16
2
17
2
18
2
10
2
9
2
8
2
SRST
WT1 WT0
WTE
PONR
WRST
ERST
WDCS
2
1
2
2
2
8
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
7
2
6
2
5
4
4
Watchdog timer control register(WDTC)
Clock timer control register (WTC)
Watchdog timer
Reset occurs
Shift to sleep mode
Shift to time-base
timer mode
Shift to clock mode
Shift to stop mode
Counter
clear control
circuit
Count clock
selector
2-bit
counter
Watchdog
reset
generation
circuit
Internal reset
generation
circuit
Clear
Main clock
(dividing HCLK by 2)
Sub clock
SCLK
Time-base timer counter
Clock counter
HCLK: Oscillation clock
SCLK: Sub clock
Activate
相關(guān)PDF資料
PDF描述
MB90V495G 16-bit Proprietary Microcontroller
MB90F897PMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
MB90F897S 10-Bit Buffers/Drivers With 3-State Outputs 28-LCCC -55 to 125
MB90F897SPMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
MB90M405 Octal Edge-Triggered D-type Flip-Flops With Clear 20-CFP -55 to 125
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