參數(shù)資料
型號： MB90F897
廠商： Fujitsu Limited
英文描述： 10-Bit Buffers/Drivers With 3-State Outputs 24-CFP -55 to 125
中文描述： 16位微控制器專有
文件頁數(shù)： 62/78頁
文件大小： 746K
代理商： MB90F897
MB90895 Series
62
4.
AC Characteristics
(1) Clock timing
(V
CC
=
5.0 V
±
10 %, V
SS
=
AV
SS
=
0.0 V, T
A
=
40
°
C to
+
105
°
C)
Value
*1 : Internal operation clock frequency should not exceed 16 MHz.
*2 : When selecting the PLL clock, the range of clock frequency is limitted. Use this product within range as mentioned
in “Relation among external clock frequency and internal clock frequency”.
Parameter
Symbol
Pin name
Unit
Remarks
Min
Typ
Max
Clock frequency
f
C
X0, X1
3
—
8
MHz
When crystal or ceramic
resonator is used*
2
3
—
16
MHz External clock *
1,
*
2
f
CL
X0A, X1A
—
32.768
—
kHz
MB90F897 only
Clock cycle time
t
HCYL
X0, X1
125
—
333
ns
μ
s
t
LCYL
X0A, X1A
—
30.5
—
MB90F897 only
Input clock pulse width
P
WH
, P
WL
X0
10
—
—
ns
Set duty factor at 30% to
70% as a guideline.
P
WLH
,P
WLL
X0A
—
15.2
—
μ
s
MB90F897 only
Input clock rise time and fall
time
t
CR
, t
CF
X0
—
—
5
ns
When external clock is
used
Internal operation clock
frequency
f
CP
—
1.5
—
16
MHz When main clock is used
f
LCP
—
—
8.192
—
kHz
When sub clock is used,
MB90F897 only
Internal operation clock cycle
time
t
CP
—
62.5
—
666
ns
When main clock is used
t
LCP
—
—
122.1
—
μ
s
When sub clock is used,
MB90F897 only
X0
t
HCYL
t
CF
t
CR
0.8 V
CC
0.2 V
CC
P
WH
P
WL
X0A
t
LCYL
t
CF
t
CR
0.8 V
CC
0.2 V
CC
P
WLH
P
WLL
Clock timing
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