![](http://datasheet.mmic.net.cn/330000/MB90M407APF_datasheet_16438116/MB90M407APF_32.png)
MB90M405 Series
32
6.
16-bit I/O Timers
The 16-bit I/O timer can perform dual independent waveform output, input pulse width measurement, and external
clock cycle measurement, based on the 16-bit freerun timer.
16-bit freerun timer (1 channel)
The 16-bit freerun timer is made up of a 16-bit up counter (timer counter data register (TCDT) ) , timer counter
control status register (TCCS) , and prescaler. The counter output value of the 16-bit freerun timer is used as
the base timer for output comparison and input capture.
Counter operation clock (4 different settings available)
4 internal clock types :
φ
/4,
φ
/16,
φ
/32,
φ
/64
φ
: Machine clock frequency
Interrupt
An interrupt can be output to the CPU when the counter value overflows, or when it matches the value of
comparison register 0.
Initialize
When a reset is input, if the software reset bit is cleared to “0”, or if the values of comparison register 0 and
the freerun timer count match, the counter value can be initialized to “0000
H
”.
Output compare (1 channel)
The output comparison module consists of a 1-channel 16-bit comparison register, and control register. If the
value of the 16-bit freerun timer and that of the compare register match, an interrupt request can be output to
the CPU.
Input capture (2 channels)
The input capture module consists of a capture register and a control register. Both support two independent
external input pin channels. The capture register can store the value of the 16-bit freerun timer. Additionally, the
register can detect signal input edges from external pins, and simultaneously output interrupts to the CPU.
The detection edge of the external input signal can be configured (rising edge, falling edge, both edges)
The two input capture channels can operate independently
Interrupts can be output upon detection of a valid edge in an external input signal
Input capture interrupts start the extended intelligent I/O service