參數(shù)資料
型號(hào): MB91107PFV-G
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁(yè)數(shù): 5/111頁(yè)
文件大?。?/td> 1337K
代理商: MB91107PFV-G
MB91107
102
Branch instructions with delays (20 instructions)
Notes: The relations between rel8 field of TYPE-D and rel11 field of TYPE-F in the instruction format and
assembler discription label9 and label12 are as follows.
label9
→ rel8 = (label9 – PC – 2)/2
label12
→ rel11 = (label12 – PC – 2)/2
Delayed branch operation always executes next instruction (delay slot) before making a branch.
Instructions allowed to be stored in the delay slot must meet one of the following conditions. If the other
instruction is stored, this device may operate other operation than defined.
The instruction described “1” in the other cycle column than branch instruction.
The instruction described “a”, “b”, “c” or “d” in the cycle column.
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
JMP:D
@Ri
E
9F – 0
1
–––– Ri
→ PC
CALL:D
label12
CALL:D
@Ri
F
E
D8
9F – 1
1
––––
PC + 4
→ RP,
PC + 2 + rel11
× 2 → PC
PC + 4
→ RP, Ri → PC
RET:D
E
9F – 2
1
–––– RP
→ PC
Return
BNO:D
label9
BRA:D
label9
BEQ:D
label9
BNE:D
label9
BC:D
label9
BNC:D
label9
BN:D
label9
BP:D
label9
BV:D
label9
BNV:D
label9
BLT:D
label9
BGE:D
label9
BLE:D
label9
BGT:D
label9
BLS:D
label9
BHI:D
label9
D
F1
F0
F2
F3
F4
F5
F6
F7
F8
F9
FA
FB
FC
FD
FE
FF
1
––––
Non-branch
PC + 2 + rel8
× 2 → PC
PCif Z = = 1
PCif Z = = 0
PCif C = = 1
PCif C = = 0
PCif N = = 1
PCif N = = 0
PCif V = = 1
PCif V = = 0
PCif V xor N = = 1
PCif V xor N = = 0
PCif (V xor N) or Z = = 1
PCif (V xor N) or Z = = 0
PCif C or Z = = 1
PCif C or Z = = 0
相關(guān)PDF資料
PDF描述
MB91108PFV 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120
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