參數(shù)資料
型號: MB91107PFV-G
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁數(shù): 84/111頁
文件大小: 1337K
代理商: MB91107PFV-G
MB91107
74
(8) Normal DRAM Mode Read/Write Cycle
(VCC
= 3.0 V to 3.6 V, AVSS = VSS = 0.0 V, TA = 0 °C to +70 °C)
*1 : When Q1 cycle or Q4 cycle is extended for 1 cycle, add tCYC time to this rating.
*2 : Rating at a gear cycle of
× 1.
When a gear cycle of 1/2, 1/4, 1/8 is selected, substitute “n” in the following equation with 1/2, 1/4, 1/8,
respectively.
Equation: (3 – n/2) × tCYC – 16
Parameter
Symbol
Pin name
Condi-
tion
Value
Unit Remarks
Min.
Max.
RAS delay time
tCLRAH
CLK
RAS
15
ns
RAS delay time
tCHRAL
15
ns
CAS delay time
tCLCASL
CLK
CAS
15
ns
CAS delay time
tCLCASH
15
ns
ROW address delay time
tCHRAV
CLK
A24 to A00
15
ns
COLUMN address delay time
tCHCAV
15
ns
DW delay time
tCHDWL
CLK
DW
15
ns
DW delay time
tCHDWH
15
ns
Output data delay time
tCHDV1
CLK
D31 to D16
15
ns
RAS
↓→ valid data input time
tRLDV
RAS
D31 to D16
5
/ 2 × tCYC 16
ns
*1
*2
CAS
↓→ valid data input time
tCLDV
CAS
D31 to D16
tCYC
17
ns
*1
CAS
↑→ data hold time
tCADH
0
ns
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