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參數(shù)資料
| 型號(hào)： | MB91307RPFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-Bit Microcontroller |
| 中文描述： | 32-BIT, 66 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | LEAD FREE, PLASTIC, LQFP-120 |
| 文件頁(yè)數(shù)： | 30/96頁(yè) |
| 文件大小： | 963K |
| 代理商： | MB91307RPFV |
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MB91307 Series
30
■
SETTING MODE
In the FR family, the mode pins (MD2, MD1, MD0) and the mode register (MODR) are used to set the operating
mode.
1.
Mode Pins
The three pins MD2, MD1, MD0 are used in mode vector fetch instructions, and also to make settings in test mode.
Mode pin
Mode name
Reset vector access area
MD2
MD1
MD0
2.
Mode Register (MODR)
The mode data fetch instruction writes data to the address “0000 07FD
H
” called the mode data.
The area “0000 07FD
H
” is the mode register (MODR). When a setting is made to this register, the device will
operate the mode corresponding to that setting.
The mode register can only be set by a reset source at the INIT level. It is not possible to write to this register
from a user program.
Note : No data exists at the FR family mode register address (0000 07FF
H
).
[bit7 to bit3] Reserved bits
These bits should always be set to “00000.” If set to any other value, stable operation is not assured.
[bit2] ROMA (Internal RAM enable bit)
This bit indicates whether internal RAM is enabled.
ROMA
[bit1, 0] WTH1, WTH0 (Bus width indicator bits)
In external bus mode, these bits determine the bus width setting.
In external bus mode, the value of these bits sets the BW1, 0 bits in the AMD0 register (CS0 area).
WTH1
WTH0
Remarks
0
0
1
External ROM mode vector
Outside
Bus width is set by mode register.
Function
Remarks
0
External ROM mode
The built-in RAM area functions as external area.
1
Internal RAM mode
The built-in RAM area is enabled.
The 128K bytes built-in RAM can be used.
Bus width
0
0
8-bit
0
1
16-bit
1
0
Setting prohibited
1
1
Setting prohibited
<
Detailed register description >
MODR
Address
0000 07FD
H
Default
XXXXXXXX
B
7
6
5
4
3
2
1
0
0
0
0
0
0
ROMA
WTH1
WTH0
Operating mode setting bits
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