參數(shù)資料
型號(hào)： MB91307RPFV
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-Bit Microcontroller
中文描述： 32-BIT, 66 MHz, RISC MICROCONTROLLER, PQFP120
封裝： LEAD FREE, PLASTIC, LQFP-120
文件頁數(shù)： 68/96頁
文件大?。?/td> 963K
代理商： MB91307RPFV
MB91307 Series
68
10. External Interface
(1) Overview
The external interface controller controls the interface between the LSI’s internal bus and external memory or I/
O devices.
This section describes the functions of the external interface.
(2) Features
Up to 32 bit-length (4G bytes space) address output.
Connects directly to many external memory (8 bit/16 bit) devices, allows control of multiple access timings.
Asynchronous SRAM, asynchronous ROM/Flash memory (multiple write strobe type or byte enable type)
Page mode ROM/flash memory (2/4/8 page size enabled)
Burst ROM/Flash memory (MBM29BL160D/161D/162D etc.)
Address/data multiplexed bus (8 bit/16 bit width only)
Synchronous memory* (ASIC built-in memory etc.)
*: Does not connect to synchronous SRAM.
8 independent bank (chip select area) settings, each with corresponding chip select output available
Each area size can be set in multiples of 64K bytes (from 64K bytes to 2G bytes per chip select area).
Each area can be set in any desired area of logic address space (boundaries limited by area size).
The following functions can be independently set for each chip select area.
Chip select area enable/disable (no access to prohibited areas)
Access timing type for each area, etc.
Detailed access timing settings (individual access type settings for wait cycle, etc.)
Data bus width setting (8 bit/16 bit)
Byte ordering endian setting* (big or little).
*: CS0 area available with big endian only.
Write prohibited setting (read-only areas)
Internal cache loading enable/disable settings
Pre-fetch function enable/disable settings
Maximum burst length setting (1,2,4,8)
Different detailed timing settings for each access timing type
Different settings can be used for each chip select area even for the same access timing type.
Auto wait setting up to 15 cycles (asynchronous SRAM, ROM, Flash, I/O areas)
Bus cycle extension with external RDY input enabled (asynchronous SRAM, ROM, Flash, I/O areas)
First access wait and page wait settings enabled (burst, page mode ROM/FLASH areas)
Different idle, recovery cycles setup delay insertion etc. enabled
Fly-by transfer with DMA enabled
Transfer between memory and I/O with 1 access
Memory wait cycle can be synchronized with I/O wait cycle during fly-by
Hold time can be obtained by delaying transfer access only
Specific idle/recovery cycles can be set for fly-by transfer
External bus arbitration using BRQ and BGRNT enabled
Pins not used in external interface can be set for use as general purpose I/O ports
相關(guān)PDF資料
PDF描述
MB91307 32-Bit Microcontroller
MB91354APMT 32-Bit Proprietary Microcontroller
MB91V350A 32-Bit Proprietary Microcontroller
MB91F355APMT-002 32-Bit Proprietary Microcontroller
MB91F356BPMT 32-Bit Proprietary Microcontroller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB91310 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Proprietary 32-bit Microcontroller
MB91314A 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller
MB91314APMC-GE1 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller
MB91316 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91316A 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*