參數(shù)資料
型號(hào)： MB91F223SPFV-GSE1
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁(yè)數(shù)： 14/46頁(yè)
文件大?。?/td> 2487K
代理商： MB91F223SPFV-GSE1
USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
28
-
xxxx
W/R
When read, this becomes to receive data FIFO register.
If it is set to 8-bit mode, lower 8 bit[7:0] is valid.
When write, this becomes to transmit data FIFO register.
If it is set to 8-bit mode, lower 8 bit[7:0] is valid.
Both for read and write, cycle time of 200ns (min) is needed.
(Continuous access at 5MHz is available)
Read when IN buffer is selected or write when OUT buffer is
selected is inhibited.
EP0_FIFO data
EP0_FIFO
[15:0]
15 to 0
Bit
Name
Function
W/R
USB
S/W
H/W
Reset
Bit
Name
Reset
-
00h
W/R
Write/Read "0"
Set the control read continuous transmit data length (byte).
It can be set up to FFh (255bytes).
In control read continuous transmit mode, write FIFO data (transmit data)
after set this register.
This is available in control read continuous transmit mode.
Control read
continuous transmit
data length
SDLN
[7:0]
Reserved
14-8
7 to 0
Function
W/R
USB
S/W
H/W
SDLN[7:0]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D15
D13
D14
EP0_FIFO[15:0]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D15
D13
D14
(3-10) EP0_FIFO Data Register (Address : 34h)
(3-11) EP0 Continuous transmit Data Length (Address : 36h)
Name
Function
-
0
W/R
To write "1" into this register, status stage of control transfer can be
completed.
If this bit is "1" and response PID is BUF("01"), Null data is transmitted
in control write transfer, and do response ACK in control read transfer
when received NULL data.
If this bit is "0", do response NAK in status stage.
This flag is reset to "0" when received setup packet.
Control transfer
complete enable
CCPL
10
Write/Read "0"
-
00h
R
Received data length(byte) can be read from this register.
If RCNT mode is set, every time when read EP0_FIFO data register,
it is counted down by -1(8-bit mode) or by -2(16-bit mode).
This bit shows effective value when E0req bit is "0".
Control write
receive
data length
Reserved
ODLN
[7:0]
9 to 8
7 to 0
Bit
Name
W/R
USB
S/W
H/W
Reset
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