參數(shù)資料
型號(hào)： MB96F395YSBPMC-GSE2
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 56 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 75/96頁
文件大?。?/td> 2534K
代理商： MB96F395YSBPMC-GSE2
PRELIMINARY
MB96390 Series
FME-MB96390 rev 3
77
Accuracy and setting of the A/D Converter sampling time
If the external impedance is too high or the sampling time too short, the analog voltage charged to the internal
sample and hold capacitor is insufcient, adversely affecting the A/D conversion precision.
To satisfy the A/D conversion precision, a sufcient sampling time must be selected. The required sampling time
depends on the external driving impedance Rext, the board capacitance of the A/D converter input pin Cext and
the AVcc voltage level. The following replacement model can be used for the calculation:
The sampling time should be set to minimum “7
τ“. The following approximation formula for the replacement
model above can be used:
Tsamp [min] = 7
× (Rext × (Cext + CIN) + (Rext + RADC) × CADC)
Do not select a sampling time below the absolute minimum permitted value
(0.5
s for 4.5V ≤ AVcc ≤ 5.5V; 1.2 s for 3.0V ≤ AVcc < 4.5V).
If the sampling time cannot be sufcient, connect a capacitor of about 0.1
F to the analog input pin. In this
case the internal sampling capacitance CADC will be charged out of this external capacitance.
A big external driving impedance also adversely affects the A/D conversion precision due to the pin input
leakage current IIL (static current before the sampling switch) or the analog input leakage current IAIN (total
leakage current of pin input and comparator during sampling). The effect of the pin input leakage current IIL
cannot be compensated by an external capacitor.
The accuracy gets worse as |AVRH - AVRL| becomes smaller.
Comparator
Sampling switch
RADC
CADC
Analog
Rext
Cext
input
MCU
Source
Rext: external driving impedance
Cext: capacitance of PCB at A/D converter input
RADC: resistance within MCU: 2.6k
(max) for 4.5V ≤ AVcc ≤ 5.5V
12k
(max) for 3.0V ≤ AVcc < 4.5V
CADC: sampling capacitance within MCU: 10pF (max)
CIN
CIN: capacitance of MCU input pin: 15pF (max)
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