參數(shù)資料
型號: MBM29F002B
廠商: Fujitsu Limited
英文描述: 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器)
中文描述: 200萬(256K × 8)位快閃記憶體(單5V的電源電壓256K × 8位閃速存儲器)
文件頁數(shù): 3/52頁
文件大小: 591K
代理商: MBM29F002B
3
MBM29F002T/002B/002ST/002SB
-70/-90/-12
I
GENERAL DESCRIPTION
The MBM29F002T/002B/002ST/002SB is a 2M-bit, 5.0 V-only Flash memory organized as 256K bytes of 8 bits
each. The MBM29F002T/002B/002ST/002SB is offered in a 32-pin TSOP and 32-pin PLCC packages. The
MBM29F002ST/002SB is offered in a 40-pin TSOP package. This device is designed to be programmed in-
system with the standard system 5.0 V V
CC
supply. A 12.0 V V
The device can also be reprogrammed in standard EPROM programmers. The MBM29F002T/002B/002ST/
002SB is erased when shipped from the factory.
The standard MBM29F002T/002B/002ST/002/SB offers access times 70 ns, 90 ns and 120 ns, allowing
operation of high-speed microprocessors without wait states. To eliminate bus contention the device has separate
chip enable (CE), write enable (WE), and output enable (OE) controls.
PP
is not required for write or erase operations.
The MBM29F002T/002B/002ST/002SB is command set compatible with JEDEC standard 2M-bit E
Commands are written to the command register using standard microprocessor write timings. Register contents
serve as input to an internal state-machine which controls the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the programming and erase operations. Reading data out
of the device is similar to reading from 12.0 V Flash or EPROM devices.
2
PROMs.
The MBM29F002T/002B/002ST/002SB is programmed by executing the program command sequence. This will
invoke the Embedded Program Algorithm which is an internal algorithm that automatically times the program
pulse widths and verifies proper cell margin. Typically, each sector can be programmed and verified in less than
0.5 seconds. Erase is accomplished by executing the erase command sequence. This will invoke the Embedded
Erase Algorithm which is an internal algorithm that automatically preprograms the array if it is not already
programmed before executing the erase operation. During erase, the device automatically times the erase pulse
widths and verifies proper cell margin.
A sector is typically erased and verified in 1 second (if already completely preprogrammed.)
This device also features a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors.
The device features single 5.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
or by the Toggle Bit feature on DQ
6
. Once the end of a program or erase cycle has been completed, the device
internally resets to the read mode.
CC
detector automatically
7
Fujitsu’s Flash technology combines years of EPROM and E
of quality, reliability and cost effectiveness. The MBM29F002T/002B/002ST/002SB memory electrically erases
the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The byte is programmed
one byte at a time using the EPROM programming mechanism of hot electron injection.
2
PROM experience to produce the highest levels
相關PDF資料
PDF描述
MBM29F002SB 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器)
MBM29F002ST 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器)
MBM29F002T 2M (256K ×8) Bit Flash Memory( 單5V 電源電壓256K ×8位閃速存儲器)
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