參數(shù)資料
型號: MBM29F002BC-90
廠商: Fujitsu Limited
英文描述: 2M (256K X 8) BIT
中文描述: 200萬(256K × 8)位
文件頁數(shù): 18/46頁
文件大小: 461K
代理商: MBM29F002BC-90
18
MBM29F002TC
-55/-70/-90
/MBM29F002BC
-55/-70/-90
DQ
3
Sector Erase Timer
After the completion of the initial sector erase command sequence the sector erase time-out will begin. DQ
3
will
remain low until the time-out is complete. Data Polling and Toggle Bit I are valid after the initial sector erase
command sequence.
If Data Polling or the Toggle Bit I indicates the device has been written with a valid erase command, DQ
3
may
be used to determine if the sector erase timer window is still open. If DQ
3
is high (“1”) the internally controlled
erase cycle has begun; attempts to write subsequent commands (other than Erase Suspend) to the device will
be ignored until the erase operation is completed as indicated by Data Polling or Toggle Bit I. If DQ
3
is low (“0”),
the device will accept additional sector erase commands. To insure the command has been accepted, the system
software should check the status of DQ
3
prior to and following each subsequent sector erase command. If DQ
3
were high on the second status check, the command may not have been accepted.
Refer to Table 7: Hardware Sequence Flags.
DQ
2
Toggle Bit II
This toggle bit II, along with DQ
6
, can be used to determine whether the device is in the Embedded Erase
Algorithm or in Erase Suspend.
Successive reads from the erasing sector will cause DQ
2
to toggle during the Embedded Erase Algorithm. If
the device is in the erase-suspended-read mode, successive reads from the erase-suspended sector will cause
DQ
2
to toggle. When the device is in the erase-suspended-program mode, successive reads from the byte
address of the non-erase suspended sector will indicate a logic “1” at the DQ
2
bit.
Notes:
1.These status flags apply when outputs are read from a sector that has been erase-suspended.
2.These status flags apply when outputs are read from the byte address of the non-erase suspended sector.
DQ
6
is different from DQ
2
in that DQ
6
toggles only when the standard program or Erase, or Erase Suspend
Program operation is in progress. The behavior of these two status bits, along with that of DQ
7
, is summarized
as follows:
For example, DQ
2
and DQ
6
can be used together to determine the erase-suspend-read mode (DQ
2
toggles while
DQ
6
does not). See also Table 7 and Figure 15.
Furthermore, DQ
2
can also be used to determine which sector is being erased. When the device is in the erase
mode, DQ
2
toggles if this bit is read from the erasing sector.
Mode
DQ
7
DQ
6
DQ
2
Program
DQ
7
toggles
1
Erase
0
toggles
toggles
Erase Suspend Read (1)
(Erase-Suspended Sector)
1
1
toggles
Erase Suspend Program
DQ
7
(2)
toggles
1 (2)
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