參數(shù)資料
型號(hào): MBM29F033C-12PTN
廠商: FUJITSU LTD
元件分類: DRAM
英文描述: 32M (4M X 8) BIT
中文描述: 4M X 8 FLASH 5V PROM, 120 ns, PDSO40
封裝: PLASTIC, TSOP1-40
文件頁(yè)數(shù): 13/46頁(yè)
文件大小: 478K
代理商: MBM29F033C-12PTN
13
MBM29F033C
-70/-90/-12
Write
Device erasure and programming are accomplished via the command register. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the function of the device.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The
command register is written by bringing WE to V
IL
, while CE is at V
IL
and OE is at V
IH
. Addresses are latched on
the falling edge of WE or CE, whichever happens later; while data is latched on the rising edge of WE or CE,
whichever happens first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
Sector Group Protection
The MBM29F033C features hardware sector group protection. This feature will disable both program and erase
operations in any combination of sixteen sector groups of memory. Each sector group consists of four adjacent
sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31, 32-35, 36-
39, 40-43, 44-47, 48-51, 52-55, 56-59, and 60-63 (see Table 5). The sector group protection feature is enabled
using programming equipment at the user’s site. The device is shipped with all sector groups unprotected.
To activate this mode, the programming equipment must force V
ID
on address pin A
9
and control pin OE, (suggest
V
ID
= 11.5 V), CE = V
IL
. The sector addresses (A
21
, A
20
, A
19
, and A
18
) should be set to the sector to be protected.
Tables 4 and 5 define the sector address for each of the sixty four (64) individual sectors, and the sector group
address for each of the sixteen (16) individual group sectors. Programming of the protection circuitry begins on
the falling edge of the WE pulse and is terminated with the rising edge of the same. Sector addresses must be
held constant during the WE pulse. Refer to figures 14 and 21 for sector protection waveforms and algorithm.
Table 5 Sector Group Addresses
A
20
A
20
A
19
A
18
Sectors
SGA0
0
0
0
0
SA0 to SA3
SGA1
0
0
0
1
SA4 to SA7
SGA2
0
0
1
0
SA8 to SA11
SGA3
0
0
1
1
SA12 to SA15
SGA4
0
1
0
0
SA16 to SA19
SGA5
0
1
0
1
SA20 to SA23
SGA6
0
1
1
0
SA24 to SA27
SGA7
0
1
1
1
SA28 to SA31
SGA8
1
0
0
0
SA32 to SA35
SGA9
1
0
0
1
SA36 to SA39
SGA10
1
0
1
0
SA40 to SA43
SGA11
1
0
1
1
SA44 to SA47
SGA12
1
1
0
0
SA48 to SA51
SGA13
1
1
0
1
SA52 to SA55
SGA14
1
1
1
0
SA56 to SA59
SGA15
1
1
1
1
SA60 to SA63
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