參數(shù)資料
型號(hào): MBM29LV080-10
廠商: Fujitsu Limited
英文描述: 8M (1M ×8) Bit Flash Memory(8M (1M ×8)位 單5V 電源電壓閃速存儲(chǔ)器)
中文描述: 8米(1米× 8)位閃存(8米(1米× 8)位單5V的電源電壓閃速存儲(chǔ)器)
文件頁(yè)數(shù): 15/44頁(yè)
文件大?。?/td> 420K
代理商: MBM29LV080-10
15
MBM29LV080
-10/-12/-15
programmed to sectors that are not erase-suspended. Successively reading from the erase-suspended sector while
the device is in the erase-suspend-program mode will cause DQ
2
to toggle. The end of the erase-suspended program
operation is detected by the RY/BY output pin, Data polling of DQ
7
, or by the Toggle Bit I (DQ
6
) which is the same
as the regular Byte Program operation. Note that DQ
7
must be read from the byte program address while DQ
6
can
be read from any address.
To resume the operation of Sector Erase, the Resume command (30H) should be written. Any further writes of the
Resume command at this point will be ignored. Another Erase Suspend command can be written after the chip has
resumed erasing.
Write Operation Status
Table 6
Hardware Sequence Flags
Notes: 1. Performing successive read operations from the erase-suspended sector will cause DQ
2
to toggle.
2. Performing successive read operations from any address will cause DQ
6
to toggle.
3. Reading the byte address being programmed while in the erase-suspend program mode will indicate
logic “1” at the DQ
2
bit. However, successive reads from the erase-suspended sector will cause DQ
2
to
toggle.
4. DQ
0
and DQ
1
are reserve pins for future use.
5. DQ
4
is Fujitsu internal use only.
DQ
7
Data Polling
The MBM29LV080 device features Data Polling as a method to indicate to the host that the Embedded Algorithms
are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will produce
the complement of the data last written to DQ
7
. Upon completion of the Embedded Program Algorithm, an attempt
to read the device will produce the true data last written to DQ
7
. During the Embedded Erase Algorithm, an attempt
to read the device will produce a “0” at the DQ
7
output. Upon completion of the Embedded Erase Algorithm an
attempt to read the device will produce a “1” at the DQ
7
output. The flowchart for Data Polling (DQ
7
) is shown in
Figure 19.
Data polling will also flag the entry into Erase Suspend. DQ7 will switch “0” to “1” at the start of the Erase Suspend
mode. Please note that the address of an erasing sector must be applied in order to observe DQ
7
in the Erase
Suspend Mode.
Status
DQ
7
DQ
6
DQ
5
DQ
3
DQ
2
In Progress
Embedded Program Algorithm
DQ
7
Toggle
0
0
1
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
1
1
0
0
Toggle
(Note 1)
Erase Suspend Read
(Non-erase Suspended Sector)
Data
Data
Data
Data
Data
Erase Suspend Program
(Non-erase Suspended Sector)
DQ
7
Toggle
(Note 2)
0
0
1
(Note 3)
Exceeded
Time Limits
Embedded Program Algorithm
DQ
7
Toggle
1
0
1
Program/erase In Embedded Erase Algorithm
0
Toggle
1
1
N/A
Erase
Suspended
Mode
Erase Suspend Program
(Non-erase Suspended Sector)
DQ
7
Toggle
1
0
N/A
相關(guān)PDF資料
PDF描述
MBM29LV080-12 8M (1M ×8) Bit Flash Memory(8M (1M ×8)位 單5V 電源電壓閃速存儲(chǔ)器)
MBM29LV080-15 8M (1M ×8) Bit Flash Memory(8M (1M ×8)位 單5V 電源電壓閃速存儲(chǔ)器)
MBM29LV080A Audio codec with touch screen controller and power management monitor
MBM29LV080A-12 8M (1M x 8) BIT
MBM29LV080A-12PTR 8M (1M x 8) BIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29LV080A 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT
MBM29LV080A-12 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT
MBM29LV080A-12PTR 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT
MBM29LV080A-12PTV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT
MBM29LV080A-70 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT