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參數(shù)資料
| 型號： | MBM29LV080-10 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 8M (1M ×8) Bit Flash Memory(8M (1M ×8)位 單5V 電源電壓閃速存儲器) |
| 中文描述： | 8米（1米× 8）位閃存（8米（1米× 8）位單5V的電源電壓閃速存儲器） |
| 文件頁數(shù)： | 16/44頁 |
| 文件大小： | 420K |
| 代理商： | MBM29LV080-10 |
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16
MBM29LV080
-10/-12/-15
During program in Erase Suspend, Data Polling will perform the same as in regular program execution outside of
the suspend mode.
For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six write pulse sequence.
For sector erase, the Data Polling is valid after the last rising edge of the sector erase WE pulse. Data Polling must
be performed at sector address within programming and erased sector. Otherwise, the status may not be valid.
There is a case not to indicate accutual terminal evaluation with read operation at Data Polling from sector protection.
In this case, Fujitsu recommends using Toggle Bit.
Just prior to the completion of Embedded Algorithm operation DQ
7
may change asynchronously while the output
enable (OE) is asserted low. This means that the device is driving status information on DQ
7
at one instant of time
and then that byte's valid data at the next instant of time. Depending on when the system samples the DQ
7
output,
it may read the status or valid data. Even if the device has completed the Embedded Algorithm operations and DQ
7
has a valid data, the data outputs on DQ
0
to DQ
6
may be still invalid. The valid data on DQ
0
to DQ
7
will be read on
the successive read attempts.
The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase Algorithm,
Erase Suspend, erase-suspend-program mode, or sector erase time-out. (See Table 6.)
See Figure 19 for the Data Polling timing specifications and diagrams.
DQ
6
Toggle Bit I
The MBM29LV080 also features the “Toggle Bit I” as a method to indicate to the host system that the Embedded
Algorithms are in progress or completed.
During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the
device at any address will result in DQ
6
toggling between one and zero. Once the Embedded Program or Erase
Algorithm cycle is completed, DQ
6
will stop toggling and valid data will be read on the next successive attempts.
During programming, the Toggle Bit I is valid after the rising edge of the fourth WE pulse in the four write pulse
sequence. For chip erase, the Toggle Bit I is valid after the rising edge of the sixth WE pulse in the six write pulse
sequence. For Sector Erase, the Toggle Bit I is valid after the last rising edge of the sector erase WE pulse. The
Toggle Bit I is active during the Sector Erase time out.
Either CE or OE toggling will cause the DQ
6
to toggle. In addition, an Erase Suspend/Resume command will cause
DQ
6
to toggle. See Figure 11 for the Toggle Bit I timing specifications and diagrams.
DQ
5
Exceeded Timing Limits
DQ
5
will indicate if the program or erase time has exceeded the specified limits. Under these conditions DQ
5
will
produce a “1”. This is a failure condition which indicates that the program or erase cycle was not successfully
completed. Data Polling is the only operating function of the device under this condition. The CE circuit will partially
power down the device under these conditions. The OE and WE pins will control the output disable functions as
described in Table 2.
If this failure condition occurs during sector erase operation, it specifies that a particular sector is bad and may not
be reused. However other sectors are still functional and may be used for the program or erase operation. The
device must be reset to use other sectors. Write the Reset command sequence to the device, and then execute
program or erase command sequence. This allows the system to continue to use the other active sectors in the
device.
If this failure condition occurs during the chip erase operation, it specifies that the entire chip is bad or combination
of sectors are bad.
If this failure condition occurs during the byte programming operation, it specifies that the entire sector containing
that byte is bad and this sector may not be reused. (Other sectors are still functional and can be reused.)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29LV080A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT |
| MBM29LV080A-12 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT |
| MBM29LV080A-12PTR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT |
| MBM29LV080A-12PTV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT |
| MBM29LV080A-70 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8) BIT |
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