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MBM29LV652UE-
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26
Once it is protected, protection can not be cancelled, so please pay closest attention.
Write Operation Status
Detailed in Table 8 are all the status flags that can be used to check the status of the device for current mode
operation. During sector erase, the part provides the status flags automatically to the I/O ports. The information
on DQ
2
is address sensitive. This means that if an address from an erasing sector is consecutively read, then
the DQ
2
bit will toggle. However, DQ
2
will not toggle if an address from a non-erasing sector is consecutively
read. This allows the user to determine which sectors are erasing and which are not.
Once erase suspend is entered, address sensitivity still applies. If the address of a non-erasing sector (that is,
one available for read) is provided, then stored data can be read from the device. If the address of an erasing
sector (that is, one unavailable for read) is applied, the device will output its status bits.
*: Successive reads from the erasing or erase-suspend sector will cause DQ
2
to toggle. Reading from non-erase
suspend sector address will indicate logic “1” at the DQ
2
bit.
Notes: 1. DQ
0
and DQ
1
are reserve pins for future use.
2. DQ
4
is Fujitsu internal use only.
DQ
7
Data Polling
The MBM29LV652UE devices feature Data Polling as a method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the
devices will produce the complement of the data last written to DQ
7
. Upon completion of the Embedded Program
Algorithm, an attempt to read the device will produce the true data last written to DQ
7
. During the Embedded
Erase Algorithm, an attempt to read the device will produce a “0” at the DQ
7
output. Upon completion of the
Embedded Erase Algorithm an attempt to read the device will produce a “1” at the DQ
7
output. The flowchart
for Data Polling (DQ
7
) is shown in Figure 20.
For programming, the Data Polling is valid after the rising edge of fourth write pulse in the four write pulse
sequence.
Table 8 Hardware Sequence Flags
Status
DQ
7
DQ
6
DQ
5
DQ
3
DQ
2
In Progress
Embedded Program Algorithm
DQ
7
Toggle
0
0
1
Embedded Erase Algorithm
0
Toggle
0
1
Toggle*
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
1
1
0
0
Toggle
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Data
Data
Data
Data
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
0
0
1*
Exceeded
Time Limits
Embedded Program Algorithm
DQ
7
Toggle
1
0
1
Embedded Erase Algorithm
0
Toggle
1
1
N/A
Erase
Suspended
Mode
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
1
0
N/A