Table 9. 10EP DC CHARACTERISTICS, NECL VCC
參數資料
型號: MC100EP195FAR2
廠商: ON Semiconductor
文件頁數: 20/20頁
文件大?。?/td> 0K
描述: IC DELAY LINE 1024TAP 32-LQFP
標準包裝: 1
系列: 100EP
標片/步級數: 1024
功能: 可編程
延遲到第一抽頭: 2.2ns
接頭增量: 10ps
可用的總延遲: 2.2ns ~ 12.2ns
獨立延遲數: 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應商設備封裝: 32-LQFP(7x7)
包裝: 剪切帶 (CT)
其它名稱: MC100EP195FAROSCT
MC10EP195, MC100EP195
http://onsemi.com
9
Table 9. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = 3.3 V to 3.0 V (Note 10)
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
IEE
Negative Power Supply Current
100
145
175
100
150
180
100
150
180
mA
VOH
Output HIGH Voltage (Note 11)
1135 1010
885
1070
945
820
1010
885
760
mV
VOL
Output LOW Voltage (Note 11)
1935 1810 1685 1870 1745 1620 1810 1685 1560
mV
VIH
Input HIGH Voltage (SingleEnded)
LVNECL
1210
885
1145
820
1085
760
mV
VIL
Input LOW Voltage (SingleEnded)
LVNECL
1935
1610 1870
1545 1810
1485
mV
VBB
ECL Output Voltage Reference
1510 1410 1310 1445 1345 1245 1385 1285 1185
mV
VEF
Reference Voltage for ECL Mode
Connection
1380 1280 1180 1320 1220 1120 1270 1170 1070
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 12)
VEE+2.0
0.0
VEE+2.0
0.0
VEE+2.0
0.0
V
IIH
Input HIGH Current (@ VIH)
150
mA
IIL
Input LOW Current (@ VIL)IN
IN
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10.Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to 0.3 V.
11. All loading with 50 W to VCC 2.0 V.
12.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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