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參數(shù)資料
| 型號： | MC100LVEL51MNR4G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 鎖存器 |
| 英文描述： | 3.3V ECL Differential Clock D Flip-Flop |
| 中文描述： | 100LVEL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, DSO8 |
| 封裝： | LEAD FREE, DFN-8 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 140K |
| 代理商： | MC100LVEL51MNR4G |
Semiconductor Components Industries, LLC, 2006
December, 2006
Rev. 4
1
Publication Order Number:
MC100LVEL51/D
MC100LVEL51
3.3VECL Differential Clock
D Flip-Flop
Description
The MC100LVEL51 is a differential clock D flip-flop with reset. The
device is functionally equivalent to the EL51 device, but operates from a
3.3 V supply. With propagation delays and output transition times
essentially equal to the EL51, the LVEL51 is ideally suited for those
applications which require the ultimate in AC performance at 3.3 V V
CC
.
The reset input is an asynchronous, level triggered signal. Data enters
the master portion of the flip-flop when the clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition of
the clock. The differential clock inputs of the LVEL51 allow the device to
be used as a negative edge triggered flip-flop.
The differential input employs clamp circuitry to maintain stability
under open input conditions. When left open, the CLK input will be
pulled down to V
EE
and the CLK input will be biased at V
CC
/2.
Features
475 ps Propagation Delay
2.8 GHz Toggle Frequency
ESD Protection: >4 kV Human Body Model,
>200 V Machine Model
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: V
CC
= 3.0 V to 3.8 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
=
3.0 V to
3.8 V
Internal Input Pulldown Resistors
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V
0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 114 devices
Pb
Free Packages are Available
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAMS*
KV51
ALYW
SOIC
8
D SUFFIX
CASE 751
1
8
TSSOP
8
DT SUFFIX
CASE 948R
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
KVL51
ALYW
1
8
DFN8
MN SUFFIX
CASE 506AA
4
1
4
(Note: Microdot may be in either location)
A = Assembly Location
L
= Wafer Lot
Y = Year
W = Work Week
M = Date Code
= Pb
Free Package
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100LVEL56DW | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V ECL Dual Diff RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC100LVEL56DWG | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V ECL Dual Diff 2:1 Mux RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC100LVEL56DWR2 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V ECL Dual Diff RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC100LVEL56DWR2G | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V ECL Dual Diff 2:1 Mux RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC100LVEL58D | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V ECL 2:1 Mux RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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