參數(shù)資料
型號: MC100LVEL51MNR4G
廠商: ON SEMICONDUCTOR
元件分類: 鎖存器
英文描述: 3.3V ECL Differential Clock D Flip-Flop
中文描述: 100LVEL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, DSO8
封裝: LEAD FREE, DFN-8
文件頁數(shù): 5/8頁
文件大?。?/td> 140K
代理商: MC100LVEL51MNR4G
MC100LVEL51
http://onsemi.com
5
ORDERING INFORMATION
Device
Package
Shipping
MC100LVEL51D
SOIC
8
98 Units / Rail
MC100LVEL51DG
SOIC
8
(Pb
Free)
98 Units / Rail
MC100LVEL51DR2
SOIC
8
2500 / Tape & Reel
MC100LVEL51DR2G
SOIC
8
(Pb
Free)
2500 / Tape & Reel
MC100LVEL51DT
TSSOP
8
100 Units / Rail
MC100LVEL51DTG
TSSOP
8
(Pb
Free)
100 Units / Rail
MC100LVEL51DTR2
TSSOP
8
2500 / Tape & Reel
MC100LVEL51DTR2G
TSSOP
8
(Pb
Free)
2500 / Tape & Reel
MC100LVEL51MNR4
DFN8
1000 / Tape & Reel
MC100LVEL51MNR4G
DFN8
(Pb
Free)
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
ECL Clock Distribution Techniques
AN1406/D
Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPS I/O SPiCE Modeling Kit
AN1504/D
Metastability and the ECLinPS Family
AN1568/D
Interfacing Between LVDS and ECL
AN1672/D
The ECL Translator Guide
AND8001/D
Odd Number Counters Design
AND8002/D
Marking and Date Codes
AND8020/D
Termination of ECL Logic Devices
AND8066/D
Interfacing with ECLinPS
AND8090/D
AC Characteristics of ECL Devices
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