參數(shù)資料
型號: MC10107L
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Triple 2-Input Exclusive OR/Exclusive NOR Gate
中文描述: 10K SERIES, TRIPLE 2-INPUT XOR/XNOR GATE, CDIP16
封裝: CERAMIC, DIP-16
文件頁數(shù): 2/5頁
文件大?。?/td> 104K
代理商: MC10107L
MC10107
3–31
MOTOROLA
MECL Data
DL122 — Rev 6
ELECTRICAL CHARACTERISTICS
Pin
Under
Test
Test Limits
–30
°
C
+25
°
C
+85
°
C
Characteristic
Symbol
Min
Max
Min
Typ
Max
Min
Max
Unit
Power Supply Drain Current
IE
IinH
8
31
28
31
mAdc
Input Current
4, 9, 14
5, 7, 15
425
350
265
220
265
220
μ
Adc
IinL
VOH
*
0.5
0.5
0.3
μ
Adc
Output Voltage
Logic 1
2
2
3
3
–1.060
–1.060
–1.060
–1.060
–0.890
–0.890
–0.890
–0.890
–0.960
–0.960
–0.960
–0.960
–0.810
–0.810
–0.810
–0.810
–0.890
–0.890
–0.890
–0.890
–0.700
–0.700
–0.700
–0.700
Vdc
Output Voltage
Logic 0
VOL
2
2
3
3
–1.890
–1.890
–1.890
–1.890
–1.675
–1.675
–1.675
–1.675
–1.850
–1.850
–1.850
–1.850
–1.650
–1.650
–1.650
–1.650
–1.825
–1.825
–1.825
–1.825
–1.615
–1.615
–1.615
–1.615
Vdc
Threshold Voltage
Logic 1
VOHA
2
2
3
3
–1.080
–1.080
–1.080
–1.080
–0.980
–0.980
–0.980
–0.980
–0.910
–0.910
–0.910
–0.910
Vdc
Threshold Voltage
Logic 0
VOLA
2
2
3
3
–1.655
–1.655
–1.655
–1.655
–1.630
–1.630
–1.630
–1.630
–1.595
–1.595
–1.595
–1.595
Vdc
Switching Times
(50
Load)
Min
Typ
Max
ns
Propagation Delay
t++
t+ –
t–+
t– –
Inputs
4,9 or 14
to either
Output
–1.1
1.1
1.1
1.1
3.8
3.8
3.8
3.8
1.1
1.1
1.1
1.1
2.0
2.0
2.0
2.0
3.7
3.7
3.7
3.7
1.1
1.1
1.1
1.1
4.0
4.0
4.0
4.0
t++
t+ –
t–+
t– –
Inputs
5,7 or 15
to either
Output
1.1
1.1
1.1
1.1
3.8
3.8
3.8
3.8
1.1
1.1
1.1
1.1
2.8
2.8
2.8
2.8
3.7
3.7
3.7
3.7
1.1
1.1
1.1
1.1
4.0
4.0
4.0
4.0
Rise Time
(20 to 80%)
t+
**
1.1
3.5
1.1
2.5
3.5
1.1
3.8
Fall Time
(20 to 80%)
t–
**
1.1
3.5
1.1
2.5
3.5
1.1
3.8
* Individually test each input applying VIH or VIL to input under test.
** Any Output.
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