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參數(shù)資料
| 型號： | MC10107L |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Triple 2-Input Exclusive OR/Exclusive NOR Gate |
| 中文描述： | 10K SERIES, TRIPLE 2-INPUT XOR/XNOR GATE, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 104K |
| 代理商： | MC10107L |
MC10107
MOTOROLA
MECL Data
DL122 — Rev 6
3–32
ELECTRICAL CHARACTERISTICS
(continued)
TEST VOLTAGE VALUES
(Volts)
@ Test Temperature
VIHmax
–0.890
VILmin
–1.890
VIHAmin
–1.205
VILAmax
–1.500
VEE
–5.2
–30
°
C
+25
°
C
–0.810
–1.850
–1.105
–1.475
–5.2
+85
°
C
–0.700
–1.825
–1.035
–1.440
–5.2
Pin
Under
Test
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(VCC)
Gnd
Characteristic
Symbol
VIHmax
5, 7, 15
VILmin
VIHAmin
VILAmax
VEE
8
Power Supply Drain Current
IE
IinH
8
1, 16
Input Current
4, 9, 14
5, 7, 15
*
*
8
8
1, 16
1, 16
IinL
VOH
*
*
8
1, 16
Output Voltage
Logic 1
2
2
3
3
4, 5
4
5
8
8
8
8
1, 16
1, 16
1, 16
1, 16
Output Voltage
Logic 0
VOL
2
2
3
3
4
5
4, 5
8
8
8
8
1, 16
1, 16
1, 16
1, 16
Threshold Voltage
Logic 1
VOHA
2
2
3
3
5
4
4
5
4
8
8
8
8
1, 16
1, 16
1, 16
1, 16
Threshold Voltage
Logic 0
VOLA
2
2
3
3
5
4
5
4
4
8
8
8
8
1, 16
1, 16
1, 16
1, 16
Switching Times
(50
Load)
+1.1V
Pulse In
Pulse Out
–3.2 V
+2.0 V
Propagation Delay
t++
t+ –
t–+
t– –
Inputs
4,9 or 14
to either
Output
5, 7, 15
5, 7, 15
5, 7, 15
5, 7, 15
Input
4, 9 or
14
Corresponding
XOR/XNOR
Outputs
8
8
8
8
1, 16
1, 16
1, 16
1, 16
t++
t+ –
t–+
t– –
Inputs
5,7 or 15
to either
Output
4, 9, 14
4, 9, 14
4, 9, 14
4, 9, 14
Input
5, 7 or
15
Corresponding
XOR/XNOR
Outputs
8
8
8
8
1, 16
1, 16
1, 16
1, 16
Rise Time
(20 to 80%)
t+
**
4, 9, 14
Any Input
Corresponding
XOR/XNOR
Outputs
8
1, 16
Fall Time
(20 to 80%)
t–
**
4, 9, 14
Any Input
8
1, 16
* Individually test each input applying VIH or VIL to input under test.
** Any Output.
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC10107P | Triple 2-Input Exclusive OR/Exclusive NOR Gate |
| MC10109FN | Replaced by SN54LS132 : Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CDIP -55 to 125 |
| MC10109 | Line Drivers 14-CFP -55 to 125 |
| MC10109L | Replaced by SN54LS132 : Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CDIP -55 to 125 |
| MC10109P | Hex Schmitt-trigger Inverters 14-CDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10107P | 制造商:ON Semiconductor 功能描述:XOR/XNOR Gate 3-Element 2-IN ECL 16-Pin PDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10109L | 制造商:ON Semiconductor 功能描述:OR/NOR Gate 2-Element 4-5-IN ECL 16-Pin CDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10109L WAF | 制造商:ON Semiconductor 功能描述: |
| MC10109LDS | 制造商:Motorola Inc 功能描述:Electronic Component |
| MC10109P | 制造商:ON Semiconductor 功能描述:OR/NOR Gate 2-Element 4-5-IN ECL 16-Pin PDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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