參數資料
型號: MC13226V
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA99
封裝: 9.50 X 9.50 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, LGA-99
文件頁數: 40/54頁
文件大小: 490K
代理商: MC13226V
MC1322x Technical Data, Rev. 1.3
Freescale Semiconductor
45
7.11
I2C Specifications
Table 19 describes the timing requirements for the I2C system.
The I2C module is driven by the peripheral bus clock (typically max 24 MHz) and the SCL bit clock is
generated from a prescaler. The prescaler divide ratio can be programmed from 61,440 to 160 (decimal)
which gives a maximum bit clock of 150 kbps.
Figure 13. I2C Timing Diagram
NOTE
The I2C timing limits reflect values that are necessary meet to the I2C Bus
specification.
Table 19. I2C Signal DC Specifications (I2C_SDA and I2C_SCL)
Parameter
Symbol
Min
Typical
Max
Unit
Input Low Voltage
VIL
-0.3
-
0.3 VDDINT
V
Input High Voltage
VIH
0.7 VBATT
-
VBATT + 0.3
V
Input hysteresis
Vhys
0.06
× VBATT
V
Output Low Voltage1 (IOL = 5 mA)
1 SDA and SCL are open drain outputs
VOL
0
-
0.2 VBATT
V
Input Current (VIN = 0 V or VDDINT)IIN
--
±1
A
Pin capacitance
Cin
<10
pF
SDA
SCL
t
f
t
HD
t
LOW
t
r
t
HD;DAT
t
SU;DAT
t
HIGH
t
f
SSr
t
SU;STA
t
HD:STA
P
t
r
t
BUF
S
t
SU;STO
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