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參數(shù)資料
| 型號： | MC145053D |
| 廠商： | MOTOROLA INC |
| 元件分類： | ADC |
| 英文描述： | -48V Hot Swap Controller 8-MSOP -40 to 85 |
| 中文描述： | 5-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO14 |
| 封裝： | SOG-14 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MC145053D |
MC145053
2
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS DEVICE DATA
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VDD
Vref
VAG
Vin
DC Supply Voltage (Referenced to VSS)
DC Reference Voltage
– 0.5 to + 6.0
V
VAG to VDD + 0.1
VSS – 0.1 to Vref
VSS – 0.5 to
VDD + 0.5
V
Analog Ground
V
DC Input Voltage, Any Analog or Digital
Input
V
Vout
DC Output Voltage
VSS – 0.5 to
VDD + 0.5
V
Iin
Iout
DC Input Current, per Pin
±
20
mA
DC Output Current, per Pin
±
25
mA
IDD, ISS
Tstg
TL
DC Supply Current, VDD and VSS Pins
Storage Temperature
±
50
mA
– 65 to 150
°
C
Lead Temperature, 1 mm from Case for
10 Seconds
260
°
C
* Maximum Ratings are those values beyond which damage to the device may occur. Func-
tional operation should be restricted to the Operation Ranges below..
OPERATION RANGES
(Applicable to Guaranteed Limits)
Symbol
Parameter
Value
Unit
VDD
Vref
VAG
VAI
Vin, Vout
TA
NOTE: Analog input voltages greater than Vref convert to full scale. Input voltages less than VAG convert to zero. See Vref and VAG pin
descriptions.
DC Supply Voltage, Referenced to VSS
DC Reference Voltage
4.5 to 5.5
V
VAG + 4.0 to VDD + 0.1
VSS – 0.1 to Vref – 4.0
VAG to Vref
VSS to VDD
– 40 to 125
V
Analog Ground
V
Analog Input Voltage (See Note)
V
Digital Input Voltage, Output Voltage
V
Ambient Operating Temperature
°
C
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to VSS, Full Temperature and Voltage Ranges per Operation Ranges Table, unless otherwise indicated)
Symbol
Parameter
Test Condition
Guaranteed
Limit
Unit
VIH
Minimum High-Level Input Voltage
(Din, SCLK, CS)
2.0
V
VIL
Maximum Low-Level Input Voltage
(Din, SCLK, CS)
0.8
V
VOH
Minimum High-Level Output Voltage
(Dout, EOC)
Iout = – 1.6 mA
Iout = – 20
μ
A
2.4
VDD – 0.1
V
VOL
Minimum Low-Level Output Voltage
(Dout, EOC)
Iout = + 1.6 mA
Iout = + 20
μ
A
0.4
0.1
V
Iin
Maximum Input Leakage Current
(Din, SCLK, CS)
Vin = VSS or VDD
±
2.5
μ
A
IOZ
IDD
Iref
IAl
Maximum Three-State Leakage Current (Dout)
Maximum Power Supply Current
Vout = VSS or VDD
Vin = VSS or VDD, All Outputs Open
Vref = VDD, VAG = VSS
VAl = VSS to VDD
±
10
μ
A
2.5
mA
Maximum Static Analog Reference Current (Vref)
Maximum Analog Mux Input Leakage Current between all
deselected inputs and any selected input (AN0 – AN4)
100
μ
A
±
1
μ
A
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications
of any voltage higher than maximum rated
voltages to this high-impedance circuit. For
proper operation, Vin and Vout should be
constrained to the range VSS
≤
(Vin or Vout)
≤
VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either
VSS or VDD). Unused outputs must be left
open.
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