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參數(shù)資料
| 型號： | MC145053D |
| 廠商： | MOTOROLA INC |
| 元件分類： | ADC |
| 英文描述： | -48V Hot Swap Controller 8-MSOP -40 to 85 |
| 中文描述： | 5-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO14 |
| 封裝： | SOG-14 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MC145053D |
MC145053
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS DEVICE DATA
3
A/D CONVERTER ELECTRICAL CHARACTERISTICS
(Full Temperature and Voltage Ranges per Operation Ranges Table)
Characteristic
Definition and Test Conditions
Guaranteed
Limit
Unit
Resolution
Number of bits resolved by the A/D converter
10
Bits
Maximum Nonlinearity
Maximum difference between an ideal and an actual ADC transfer function
±
1
LSB
Maximum Zero Error
Difference between the maximum input voltage of an ideal and an actual
ADC for zero output code
±
1
LSB
Maximum Full-Scale Error
Difference between the minimum input voltage of an ideal and an actual
ADC for full-scale output code
±
1
LSB
Maximum Total Unadjusted Error
Maximum sum of nonlinearity, zero error, and full-scale error
±
1
LSB
Maximum Quantization Error
Uncertainty due to converter resolution
±
1/2
LSB
Absolute Accuracy
Difference between the actual input voltage and the full-scale weighted
equivalent of the binary output code, all error sources included
±
1-1/2
LSB
Maximum Conversion Time
Total time to perform a single analog-to-digital conversion
44
μ
s
Data Transfer Time
Total time to transfer digital serial data into and out of the device
10 to 16
SCLK
cycles
Sample Acquisition Time
Analog input acquisition time window
6
SCLK
cycles
Minimum Total Cycle Time
Total time to transfer serial data, sample the analog input, and perform the
conversion; SCLK = 2.1 MHz
49
μ
s
Maximum Sample Rate
Rate at which analog inputs may be sampled; SCLK = 2.1 MHz
20.4
ks/s
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