參數(shù)資料
型號(hào)： MC145202-1
廠商： Motorola, Inc.
英文描述： PLL Frequency Synthesizer(2.0GHz PLL頻率合成器)
中文描述： 鎖相環(huán)頻率合成器（2.0GHz的鎖相環(huán)頻率合成器）
文件頁(yè)數(shù)： 12/23頁(yè)
文件大?。?/td> 270K
代理商： MC145202-1
MC145202–1
12
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS – RF AND IF DEVICE DATA
TEST POINT PINS
Test 1
Modulus Control Signal (Pin 9)
This pin may be used in conjunction with the Test 2 pin for
access to the on–board 64/65 prescaler. When Test 1 is low,
the prescaler divides by 65. When high, the prescaler divides
by 64.
CAUTION
This pin is an unbuffered output and must be
floated in an actual application. This pin must be
attached to an isolated pad with no trace.
Test 2
Prescaler Output (Pin 13)
This pin may be used to access the on–board 64/65
prescaler output.
CAUTION
This pin is an unbuffered output and must be
floated in an actual application. This pin must be
attached to an isolated pad with no trace.
POWER SUPPLY PINS
VDD
Positive Power Supply (Pin 14)
This pin supplies power to the main CMOS digital portion
of the device. Also, this pin, in conjunction with the Rx
resistor, determines the internal reference current for the
PDout pin. The voltage range is
2.7 to 5.5 V with respect to
the Gnd pin.
For optimum performance, VDD should be bypassed to
Gnd using a low–inductance capacitor mounted very close to
these pins. Lead lengths on the capacitor should be
minimized.
VCC
Positive Power Supply (Pin 12)
This pin supplies power to the RF amp and 64/65
prescaler. The voltage range is
2.7 to
5.5 V with respect to
the Gnd pin. In standby mode, the VCC pin still draws a few
milliamps from the power supply. This current drain can be
eliminated with the use of transistor Q1 as shown in
Figure 21.
For optimum performance, VCC should be bypassed to
Gnd using a low–inductance capacitor mounted very close to
these pins. Lead lengths on the capacitor should be
minimized.
VPD
Positive Power Supply (Pin 5)
This pin supplies power to both phase/frequency detectors
A and B. The voltage applied on this pin may be more or less
than the potential applied to the VDD and VCC pins. The
voltage range for VPD is 2.7 to 5.5 V with respect to the Gnd
pin.
For optimum performance, VPD should be bypassed to
Gnd using a low–inductance capacitor mounted very close to
these pins. Lead lengths on the capacitor should be
minimized.
Gnd
Ground (Pin 7)
Common ground.
相關(guān)PDF資料
PDF描述
MC145225 Dual PLL Frequency Synthesizers With DACs and Voltage Multipliers(帶DACs和電壓乘法器的雙PLL頻率合成器)
MC145230 Dual PLL Frequency Synthesizers With DACs and Voltage Multipliers(帶DACs和電壓乘法器的雙PLL頻率合成器)
MC14528BCL Dual Monostable Multivibrator
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MC14528 Dual Monostable Multivibrator
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