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| 型號： | MC33389CDHR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 32/49頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYSTEM BASE W/CAN 20-HSOP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 控制器類型： | 系統(tǒng)基礎(chǔ)芯片（SBC），CAN |
| 接口： | SPI 串行 |
| 電源電壓： | 5V |
| 電流 - 電源： | 3.5mA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.433"，11.00mm 寬）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-HSOP |
| 包裝： | 帶卷 (TR) |
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Analog Integrated Circuit Device Data
38
Freescale Semiconductor
33389
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
This register reports the real time information on the state; (High or Low) of the L0, L1, and L2 inputs. The bits WUIRT1 2:0
contain the real time logic value coming from the wake-up inputs (0 means input below threshold, 1 means input above threshold.
Typical threshold is 3.5 V).
This register reports the CANH failure status.
Table 32. WUISR Bit Definition
WUISR2
WUISR1
WUISR0
Description
0
No Event on Wake-Up Inputs
x
1
Event on L0
x
1
x
Event on L1
1
x
Event on L2
In case of a wake-up event, the appropriate bit is set to 1. The bits will be reset by a Read operation of the register. After
power-ON reset, all bits are set to 0.
Table 33. Wake-Up Input Real Time Information (WUIRTI)
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WUIRTI
$011
R
WUIRTI2
WUIRTI1
WUIRTI0
W
RESET
—
0
Table 34. Over Temperature Status Register (OTSR)
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
OTSR
$012
R
OPWV2
OPWV1
OPTV2
OTV1
W
OTV2C
RESET
—
0
This register reads back the over temperature status for the V1 and V2 regulators. It is used to turn V2 ON after a V2 over tem-
perature shutdown occurred in the Write mode.
OTV1: 1 = V1 over temperature shutdown, 0 = V1 no over temperature
OTV2: 1 = V2 over temperature shutdown, 0 = V2 no over temperature
OPWM1: 1 = V2 over temperature pre-warning, 0 = V2 normal temperature
OPWV2: 1 = V2 over temperature pre-warning, 0 = V2 normal temperature
In case of V1 or V2 over temperature, the appropriate voltage regulators are switched OFF automatically, and the over temperature
flags are set (latched). The flags can be reset by a Read operation of the register OTSR. Once V2 is switched OFF because of over
temperature (OTV2 = 1 ) it can only be switched ON again by forcing OTV2C = 0 by a Write operation.
The V1 and V2 pre-warning flags are set as long as the first over temperature exists. The flags disappear, when the temperature is
below the threshold. An over temperature of the V2 power supply will also switch OFF V3. After a power-ON reset, all bits of the reg-
ister are set to 0.
Table 35. Transceiver Error Status Register for CANH (TESRH)
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TESRH
$014
R
TESRH3
TESRH2
TESRH1
TESRH0
W
RESET
—
0
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| MC33390D | 功能描述:IC TRANSCEIVER SER LINK 8-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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