參數(shù)資料
型號： MC33394DH
廠商： Freescale Semiconductor
文件頁數(shù)： 44/44頁
文件大小： 0K
描述： IC POWER SUPPLY MULT-OUT 44-HSOP
標(biāo)準(zhǔn)包裝： 30
應(yīng)用： Motorola MPC55x、MPC56x 微處理器
接口： SPI 串行
電源電壓： 4 V ~ 26.5 V
封裝/外殼： 44-BSSOP（0.433"，11.00mm 寬）裸露焊盤
供應(yīng)商設(shè)備封裝： 44-HSOP
包裝： 管件
安裝類型： 表面貼裝
33394
9
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
3. ELECTRICAL CHARACTERISTICS (–40
°C ≤ TA ≤ +125°C; +4.0 V ≤ VBAT ≤ +26.5 V using the 33394 typical application
circuit – see Figure 1, unless otherwise noted.)
Characteristic
Symbol
Min.
Typ.
Max.
Unit
DC CHARACTERISTICS:
VDDH
VDDH Output Voltage, IVDDH = –400 mA;
VDDH
4.9
5.0
5.1
V
VDDH Load Regulation, VBAT = 13.3 V; IVDDH = 0 to –400 mA;
LoadRgVDDH
–40
40
mV
VDDH Line Regulation, VBAT = 4.0 V to 26.5 V; IVDDH = –400 mA;
LineRgVDDH
–20
20
mV
VDDH Drop Out Voltage, VPRE – VDDH, IVDDH = –400 mA;
Decrease VBAT until Resets asserted
VDOV
450
mV
VDDH Output Current, VBAT = 4.0 V to 26.5 V
IVDDH
–400
mA
VDDH Short Circuit Current, VDDH = 0 V
ISC
–750
–440
mA
VDDH Maximum Allowed Feedback Current
(Note 1)
(Power Up Sequence Guaranteed)
(Note 2)
135
A
VDDH Reset Voltage, Range of VDDH where Resets must remain
asserted
VVDDH_HRST
0.5
4.8
V
Thermal Shutdown Junction Temperature
(Note 1)
TSDIS
150
190
°C
Thermal Shutdown Hysteresis
(Note 1)
TSHYS
5.0
20
°C
VDD3_3
VDD3_3 Output Voltage, IVDD3_3 = –120 mA;
VDD3_3
3.21
3.3
3.36
V
VDD3_3 Load Regulation, VBAT = 13.3 V; IVDD3_3 = 0 to –120 mA
LoadRgVDD3
–40
40
mV
VDD3_3 Line Regulation, VBAT = 4.0V to 26.5V; IVDD3_3 = –120mA
LineRgVDD3
–20
20
mV
VDD3_3 Drop Out Voltage, VPRE – VDD3_3
IVDD3_3 = –120 mA; Decrease VBAT until Resets asserted
VDOV
2.04
V
VDD3_3 Output Current, VBAT = 4.0 V to 26.5 V
IVDD3_3
–120
mA
VDD3_3 Short Circuit Current, VDD3_3 = 0 V
ISC
–320
–130
mA
VDD3_3 Maximum Allowed Feedback Current
(Note 1)
(Power Up Sequence Guaranteed)
(Note 2)
135
A
VDD3_3 Reset Voltage
Range of VDD3_3 where Resets must remain asserted
VVDD3_HRST
0.5
3.1
V
Thermal Shutdown Junction Temperature
(Note 1)
TSDIS
150
190
°C
Thermal Shutdown Hysteresis
(Note 1)
TSHYS
5.0
20
°C
VDDL
VDDL Feedback Reference Voltage, pin VDDL_FB
IVDDL_B = 0 to –40 mA
VDDLREF
1.242
1.267
1.292
V
VDDL Load Regulation, VBAT = 13.3 V; IVDDL_B = 0 to –40 mA
LoadRgVDDL
–1.6
0
%
VDDL Line Regulation
VBAT = 4.0 V to 26.5 V; IVDDL_B = –40 mA
LineRgVDDL
–0.8
0.8
%
VDDL Drop Out Voltage, VPRE – VDDL
IVDDL = –400 mA; VBAT decreases until Resets asserted
VDOV
1.3
V
VDDL Reset Voltage,
(Note 1)
Range of VDDL where Resets must remain asserted
VVDDL_HRST
0.5
VDDL
–5%
V
VDDL Susceptibility to Feeding Back
(Note 3)
(Power Up Sequence Guaranteed)
VDDLREF
0.187
V
VDDL_B Drive Output Current, VBAT = 7.5V to 26.5V
IVDDL_B
–40
mA
VDDL_B Drive Short Circuit Current
VDDL_B = 0V, VBAT = 7.5V to 26.5V
IscVDDL_B
–100
–45
mA
VDDL_X Drive Output Current, VBAT = 4.0 V to 6 V
IVDDL_B
–40
mA
VDDL_X Drive Short Circuit Current, VDDL_X = 0V, VBAT = 4.0V to 6V
IscVDDL_X
–100
–45
mA
VDDL Feedback VDDL_FB Input Current, VDDL_FB = 5.0 V
IVDDL_FB
0
2.0
A
NOTE:
1. Guaranteed by design but not production tested.
2. Maximum allowed current flowing back into the regulator output.
3. Voltage fed back into the VDDL output, which still guaranties proper Power Up sequencing.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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