Figure 2-2 56F8147 Signals Identified by Functiona" />
參數(shù)資料
型號: MC56F8147VVFE
廠商: Freescale Semiconductor
文件頁數(shù): 79/172頁
文件大小: 0K
描述: IC DGTL SIGNAL CTLR 160-MAPBGA
標準包裝: 126
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 40MHz
連通性: EBI/EMI,SCI,SPI
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 76
程序存儲器容量: 128KB(64K x 16)
程序存儲器類型: 閃存
RAM 容量: 4K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 105°C
封裝/外殼: 160-BGA
包裝: 托盤
Introduction
56F8347 Technical Data, Rev.11
Freescale Semiconductor
17
Preliminary
Figure 2-2 56F8147 Signals Identified by Functional Group1 (160-pin LQFP)
1. Alternate pin functionality is shown in parenthesis; pin direction/type shown is the default functionality.
VDD_IO
VDDA_ADC
VSS
VSSA_ADC
Other
Supply
Ports
PLL
and
Clock
External
Address
Bus
or GPIO
External
Data Bus
or GPIO
SCI 0 or
GPIO
SCI 1
or GPIO
1
7
1
6
VPP1 & VPP2
2
Power
Ground
Power
Ground
A8 - A15 (GPIOA0 - 7)
TXD0 (GPIOE0)
RXD0 (GPIOE1)
TXD1 (GPIOD6)
RXD1 (GPIOD7)
TCK
TMS
TDI
TDO
TRST
Quadrature
Decoder 0
or Quad
Timer A or
GPIO
PHASEA0 (TA0, GPIOC4)
PHASEB0 (TA1, GPIOC5)
INDEX0 (TA2, GPIOC6)
HOME0 (TA3, GPIOC7)
(MOSI1, GPIOC1)
(MISO1, GPIOC2)
(SS1, GPIOC3)
(GPIOC8 - 10)
ISB0 - 2 (GPIOD10 - 12)
FAULTB0 - 3
PWMB0 - 5
ANA0 - 7
ANB0 - 7
VREF
TC0 - 1 (GPIOE8 - 9)
(GPIOE10 - 13)
IRQA
IRQB
RESET
RSTO
SPI0 or
GPIO
SPI 1 or
GPIO
PWMB or
GPIO
ADCB
ADCA
INTERRUPT/
PROGRAM
CONTROL
(SCLK1, GPIOC0)
8
1
3
6
3
4
8
5
8
2
4
1
56F8147
EXTAL
XTAL
CLKO
1
*VCAP1 - VCAP4
4
A0 - A5 (GPIOA8 - 13)
6
A6 - A7 (GPIOE2 - 3)
2
RD
1
WR
1
PS (CS0, GPIOD8)
1
DS (CS1, GPIOD9)
1
GPIOD0 - 5 (CS2 - 7)
6
JTAG/
EOnCE
Port
External
Bus
Control or
GPIO
EXTBOOT
MOSI0 (GPIOE5)
MISO0 (GPIOE6)
SS0 (GPIOE7)
1
SCLK0 (GPIOE4)
1
EMI_MODE
OCR_DIS
1
Power
CLKMODE
1
VDDA_OSC_PLL
1
4
GPIOB0 - 3 (A16 - 19)
1
GPIOB4 (A20, prescaler_clock)
1
GPIOB5 (A21, SYS_CLK)
1
GPIOB6 (A22, SYS_CLK2)
1
GPIOB7 (A23, oscillator_clock)
D7 - D15 (GPIOF0 - 8)
D0 - D6 (GPIOF9 - 15)
7
9
QUAD
TIMER C or
GPIO
* When the on-chip regulator is disabled,
these four pins become 2.5V VDD_CORE.
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