參數(shù)資料
型號： MC56F8147VVFE
廠商： Freescale Semiconductor
文件頁數(shù)： 97/172頁
文件大小： 0K
描述： IC DGTL SIGNAL CTLR 160-MAPBGA
標準包裝： 126
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 40MHz
連通性： EBI/EMI，SCI，SPI
外圍設備： POR，PWM，WDT
輸入/輸出數(shù)： 76
程序存儲器容量： 128KB（64K x 16）
程序存儲器類型： 閃存
RAM 容量： 4K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉換器： A/D 16x12b
振蕩器型： 外部
工作溫度： -40°C ~ 105°C
封裝/外殼： 160-BGA
包裝： 托盤
56F8347 Technical Data, Rev.11
30
Freescale Semiconductor
Preliminary
MOSI0
(GPIOE5)
148
B6
Input/
Output
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
SPI 0 Master Out/Slave In — This serial data pin is an
output from a master device and an input to a slave device.
The master device places data on the MOSI line a half-cycle
before the clock edge the slave device uses to latch the data.
Port E GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is MOSI0.
To deactivate the internal pull-up resistor, clear bit 5 in the
GPIOE_PUR register.
MISO0
(GPIOE6)
147
D4
Input/
Output
Input/
Output
Input,
pull-up
enabled
SPI 0 Master In/Slave Out — This serial data pin is an input
to a master device and an output from a slave device. The
MISO line of a slave device is placed in the high-impedance
state if the slave device is not selected. The slave device
places data on the MISO line a half-cycle before the clock
edge the master device uses to latch the data.
Port E GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is MISO0.
To deactivate the internal pull-up resistor, clear bit 6 in the
GPIOE_PUR register.
SS0
(GPIOE7)
145
D5
Input
Input/
Output
Input,
pull-up
enabled
SPI 0 Slave Select — SS0 is used in slave mode to indicate
to the SPI module that the current transfer is to be received.
Port E GPIO — This GPIO pin can be individually
programmed as input or output pin.
After reset, the default state is SS0.
To deactivate the internal pull-up resistor, clear bit 7 in the
GPIOE_PUR register.
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
Signal Name
Pin
No.
Ball
No.
Type
State
During
Reset
Signal Description
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