參數(shù)資料
型號: MC56F8157
廠商: Electronic Theatre Controls, Inc.
英文描述: 16-BIT HYBRID CONTROLLERS
中文描述: 16位混合控制器
文件頁數(shù): 41/172頁
文件大?。?/td> 2444K
代理商: MC56F8157
Program Map
56F8357 Technical Data, Rev. 8.0
Freescale Semiconductor
Preliminary
41
Note:
Data Flash and Program RAM are NOT available on the 56F8157 device.
4.2 Program Map
The operating mode control bits (MA and MB) in the Operating Mode Register (OMR) control the
Program memory map. At reset, these bits are set as indicated in
Table 4-2
.
Table 4-4
shows the memory
map configurations that are possible at reset. After reset, the OMR MA bit can be changed and will have
an effect on the P-space memory map, as shown in
Table 4-3
. Changing the OMR MB bit will have no
effect
Table 4-1 Chip Memory Configurations
On-Chip Memory
56F8357
56F8157
Use Restrictions
Program Flash
256KB
256KB
Erase / Program via Flash interface unit and word writes to CDBW
Data Flash
8KB
Erase / Program via Flash interface unit and word writes to CDBW.
Data Flash can be read via one of CDBR or XDB2, but not both
simultaneously
Program RAM
4KB
None
Data RAM
16KB
16KB
None
Program Boot Flash
16KB
16KB
Erase / Program via Flash Interface unit and word to CDWB
Table 4-2 OMR MB/MA Value at Reset
OMR MB =
Flash Secured
State
1,
2
1. This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
2. Changing MB in software will not affect Flash memory security.
OMR MA =
EXTBOOT Pin
Chip Operating Mode
0
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
0
1
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
1
0
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
1
1
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
Table 4-3 Changing OMR MA Value During Normal Operation
OMR MA
Chip Operating Mode
0
Use internal P-space memory map configuration
1
Use external P-space memory map configuration – If MB = 0 at reset, changing this bit has no
effect.
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