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參數(shù)資料
型號: MC56F8255VLD
廠商: Freescale Semiconductor
文件頁數(shù): 11/88頁
文件大?。?/td> 0K
描述: DSC 64K FLASH 60MHZ 44-LQFP
標準包裝: 160
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
RAM 容量: 4K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 1x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 44-LQFP
包裝: 管件
Signal/Connection Descriptions
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Freescale Semiconductor
19
TMS
(GPIOD3)
43
47
63
input
Input/
Output
Input,
internal
pullup
enabled
Test Mode Select Input — This input pin is used to sequence the
JTAG TAP controller’s state machine. It is sampled on the rising
edge of TCK and has an on-chip pullup resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TMS
Note: Always tie the TMS pin to VDD through a 2.2K resistor if need
to keep on-board debug capability. Otherwise directly tie to VDD
RESET
(GPIOD4)
222
Input
Input/
Open-drain
Output
Input,
internal
pullup
enabled
Reset — This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed in
the reset state. A Schmitt-trigger input is used for noise immunity.
The internal reset signal is deasserted synchronous with the
internal clocks after a fixed number of internal clocks.
Port D GPIO — This GPIO pin can be individually programmed as
an input or open-drain output pin.If RESET functionality is disabled
in this mode and the chip can be reset only via POR, COP reset, or
software reset.
After reset, the default state is RESET.
GPIOA0
(ANA0&
CMPA_P2)
(CMPC_O)
8
9
13
Input/
Output
Input
Output
Input,
internal
pullup
enabled
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANA0 and CMPA_P2 — Analog input to channel 0 of ADCA and
positive input 2 of analog comparator A.
CMPC_O— Analog comparator C output
When used as an analog input, the signal goes to the ANA0 and
CMPA_P2.
After reset, the default state is GPIOA0.
GPIOA1
(ANA1&
CMPA_M0)
9
10
14
Input/
Output
Input
Input,
internal
pullup
enabled
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
ANA1 and CMPA_M0 — Analog input to channel 1of ADCA and
negative input 0 of analog comparator A.
When used as an analog input, the signal goes to the ANA1 and
CMPA_M0.
After reset, the default state is GPIOA1.
Table 5. MC56F825x/MC56F824x Signal and Package Information (continued)
Signal
Name
44
LQFP
48
LQFP
64
LQFP
Type
State
During
Reset
Signal Description
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