參數(shù)資料
型號： MC56F8335MFGE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝： ROHS COMPLIANT, PLASTIC, LQFP-128
文件頁數(shù)： 87/164頁
文件大?。?/td> 871K
代理商： MC56F8335MFGE
Signal Pins
56F8335 Technical Data, Rev. 5
Freescale Semiconductor
29
Preliminary
ISB0
(GPIOD10)
48
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
ISB0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
Port D GPIO — These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to ISB functionality.
To deactivate the internal pull-up resistor, clear the appropriate
bit of the GPIOD_PUR register. See Part 6.5.6 for details.
ISB1
(GPIOD11)
50
ISB2
(GPIOD12)
51
FAULTB0
54
Schmitt
Input
Input,
pull-up
enabled
FAULTB0 - 3 — These four fault input pins are used for disabling
selected PWMB outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pull-up resistor, set the PWMB bit in
the SIM_PUDR register. See Part 6.5.6 for details.
FAULTB1
55
FAULTB2
56
FAULTB3
57
ANA0
80
Input
Analog
Input
ANA0 - 3 — Analog inputs to ADC A, channel 0
ANA1
81
ANA2
82
ANA3
83
ANA4
84
Input
Analog
Input
ANA4 - 7 — Analog inputs to ADC A, channel 1
ANA5
85
ANA6
86
ANA7
87
VREFH
93
Input
Analog
Input
VREFH — Analog Reference Voltage High. VREFH must be less
than or equal to VDDA_ADC.
VREFP
92
Input/
Output
Analog
Input/
Output
VREFP, VREFMID & VREFN — Internal pins for voltage reference
which are brought off-chip so that they can be bypassed.
Connect to a 0.1
μF low ESR capacitor.
VREFMID
91
VREFN
90
VREFLO
89
Input
Analog
Input
VREFLO — Analog Reference Voltage Low. This should normally
be connected to a low-noise VSSA.
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
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