參數(shù)資料
型號(hào): MC56F8357MPY60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 16-bit Digital Signal Processor
中文描述: 16-BIT, 240 MHz, OTHER DSP, PQFP160
封裝: 24 X 24 MM, 0.50 MM PITCH, PLASTIC, LQFP-160
文件頁數(shù): 40/160頁
文件大小: 1394K
代理商: MC56F8357MPY60
40
56F8357 Technical Data
Preliminary
4.4 Data Map
4.5 Flash Memory Map
Figure 4-1
illustrates the Flash Memory (FM) map on the system bus.
The Flash Memory is divided into three functional blocks. The Program and boot memories reside
on the Program Memory buses. They are controlled by one set of banked registers. Data Memory
Flash resides on the Data Memory buses and is controlled separately by its own set of banked
registers.
The top nine words of the Program Memory Flash are treated as special memory locations. The
content of these words is used to control the operation of the Flash Controller. Because these words
are part of the Flash Memory content, their state is maintained during power down and reset.
During chip initialization, the content of these memory locations is loaded into Flash Memory
control registers, detailed in the Flash Memory chapter of the
DSP56F8300 Peripheral User
Manual
. In the 56F8357, these configuration parameters are located between $01_FFF7 and
$01_FFFF.
1.
from the vector table, providing only 19 bits of address.
Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced
2. If the VBA is set to $0200 (or VBA = 0000 for Mode 1, EMI_MODE = 0), the first two locations of the vector table are the
chip reset addresses; therefore, these locations are not interrupt vectors.
2.
Table 4-6 Data Memory Map
1
1.
2.
All addresses are 16-bit Word addresses, not byte addresses.
In the Operation Mode Register (OMR).
Begin/End
Address
EX = 0
2
EX = 1
X:$FF FFFF
X:$FF FF00
EOnCE
256 locations allocated
EOnCE
256 locations allocated
X:$FF FEFF
X:$01 0000
External Memory
External Memory
X:$00 FFFF
X:$00 F000
On-Chip Peripherals
4096 locations allocated
On-Chip Peripherals
4096 locations allocated
X:$00 EFFF
X:$00 3000
External Memory
External Memory
X:$00 2FFF
X:$00 2000
On-Chip Data Flash
8KB
X:$00 1FFF
X:$00 0000
On-Chip Data RAM
16KB
3
3.
The Data RAM is organized as a 2K x 32-bit memory to allow single-cycle, long-word operations.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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