參數(shù)資料
型號： MC56F8357VPY60
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝： PLASTIC, LQFP-160
文件頁數(shù)： 96/177頁
文件大小： 4091K
代理商： MC56F8357VPY60
Signal Pins
56F8357 Technical Data, Rev. 15
Freescale Semiconductor
25
Preliminary
D7
(GPIOF0)
28
K1
Input/
Output
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
Data Bus — D7 - D14 specify part of the data for external
program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), D7 - D15and EMI control signals are tri-stated
when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
Port F GPIO — These eight GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to data bus functionality.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
D8
(GPIOF1)
29
K3
D9
(GPIOF2)
30
K2
D10
(GPIOF3)
32
K4
D11
(GPIOF4)
149
A5
D12
(GPIOF5)
150
A4
D13
(GPIOF6)
151
B5
D14
(GPIOF7)
152
C4
D15
(GPIOF8)
153
A3
RD
52
P5
Output
In reset,
output is
disabled,
pull-up is
enabled
Read Enable — RD is asserted during external memory read
cycles. When RD is asserted low, pins D0 - D15 become
inputs and an external device is enabled onto the data bus.
When RD is deasserted high, the external data is latched
inside the device. When RD is asserted, it qualifies the A0 -
A23, PS, DS, and CSn pins. RD can be connected directly to
the OE pin of a static RAM or ROM.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), RD is tri-stated when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
To deactivate the internal pull-up resistor, set the CTRL bit in
the SIM_PUDR register.
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA
Signal
Name
Pin
No.
Ball No.
Type
State
During
Reset
Signal Description
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MC56F8357,
MC56F8157
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相關代理商/技術參數(shù)
參數(shù)描述
MC56F8357VPYE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8357VVF 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8357VVFE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8357VVFEJ 制造商:Freescale Semiconductor 功能描述:16 BIT HYBRID CONTROLLER - Bulk
MC56F8365 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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