SCC Programming Reference
E-30
MC68360 USER’S MANUAL
MOTOROLA
E.2.2.5 SCC INTERRUPT HANDLING.
1. Read the SCC event register.
2. Clear any unmasked bits that will be used in this interrupt routine.
3. Handle the interrupt events as required by the system.
4. Clear the appropriate SCC bit in the in-service register (ISR) of the interrupt controller.
5. Return from the interrupt.
E.3 TRANSPARENT PROGRAMMING REFERENCE SECTION
This subsection discusses the registers and parameters required to program an SCC for
transparent operation. At the end of this subsection is a generic algorithm for programming
the SCC.
E.3.1 Transparent Programming Model
The programming model and memory map for the transparent protocol is shown in E-1. The
offsets for each SCC are given above each table. Some parameters are common to all pro-
tocols. The transparent parameters are shown for those entries that are protocol specific.
Table E-3(b) depicts the general and protocol-specific parameter RAM for each SCC. The
SCC registers are shown in Table E-3(c), and the communications processor registers are
shown in Table E-3(d). Note that reserved bits in registers should be written as zeros.