MOTOROLA
MC68302 USER’S MANUAL
v
TABLE OF CONTENTS
Paragraph
Number
Title
Page
Number
Section 1
General Description
1.1
1.2
1.3
1.4
1.5
Block Diagram......................................................................................... 1-1
Features.................................................................................................. 1-3
MC68302 System Architecture ............................................................... 1-4
NMSI Communications-Oriented Environment ....................................... 1-5
Basic Rate ISDN or Digital Voice/Data Terminal .................................... 1-6
Section 2
MC68000/MC68008 Core
2.1
2.2
2.3
2.4
2.4.1
2.4.2
2.5
2.6
2.7
2.8
2.9
Programming Model................................................................................ 2-1
Instruction Set Summary......................................................................... 2-3
Address Spaces...................................................................................... 2-6
Exception Processing.............................................................................. 2-8
Exception Vectors................................................................................... 2-8
Exception Stacking Order ....................................................................... 2-9
Interrupt Processing.............................................................................. 2-11
M68000 Signal Differences................................................................... 2-11
MC68302 IMP Configuration Control.................................................... 2-12
MC68302 Memory Map......................................................................... 2-14
Event Registers..................................................................................... 2-19
Section 3
System Integration Block (SIB)
DMA Control............................................................................................ 3-2
Key Features........................................................................................... 3-2
IDMA Registers (Independent DMA Controller)...................................... 3-3
Channel Mode Register (CMR)............................................................... 3-4
Source Address Pointer Register (SAPR)............................................... 3-6
Destination Address Pointer Register (DAPR)........................................ 3-6
Function Code Register (FCR)................................................................ 3-7
Byte Count Register (BCR)..................................................................... 3-7
Channel Status Register (CSR).............................................................. 3-7
Interface Signals ..................................................................................... 3-8
DREQ and DACK.................................................................................... 3-8
DONE...................................................................................................... 3-8
IDMA Operational Description................................................................. 3-9
Channel Initialization............................................................................... 3-9
Data Transfer.......................................................................................... 3-9
3.1
3.1.1
3.1.2
3.1.2.1
3.1.2.2
3.1.2.3
3.1.2.4
3.1.2.5
3.1.2.6
3.1.3
3.1.3.1
3.1.3.2
3.1.4
3.1.4.1
3.1.4.2